Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI: fixup sparse endianness warnings in proc.c PCI PM: make more PCI PM core functionality available to drivers PCI/DMAR: don't assume presence of RMRRs PCI hotplug: fix error path in pci_slot's register_slot
This commit is contained in:
commit
5042d99795
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@ -6,8 +6,8 @@
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* Thanks to Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> for code
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* Thanks to Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> for code
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* review and fixes.
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* review and fixes.
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*
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*
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* Copyright (C) 2007 Alex Chiang <achiang@hp.com>
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* Copyright (C) 2007-2008 Hewlett-Packard Development Company, L.P.
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* Copyright (C) 2007 Hewlett-Packard Development Company, L.P.
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* Alex Chiang <achiang@hp.com>
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* under the terms and conditions of the GNU General Public License,
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@ -158,6 +158,7 @@ register_slot(acpi_handle handle, u32 lvl, void *context, void **rv)
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if (IS_ERR(pci_slot)) {
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if (IS_ERR(pci_slot)) {
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err("pci_create_slot returned %ld\n", PTR_ERR(pci_slot));
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err("pci_create_slot returned %ld\n", PTR_ERR(pci_slot));
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kfree(slot);
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kfree(slot);
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return AE_OK;
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}
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}
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slot->root_handle = parent_context->root_handle;
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slot->root_handle = parent_context->root_handle;
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@ -317,10 +317,8 @@ int __init dmar_table_init(void)
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return -ENODEV;
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return -ENODEV;
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}
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}
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if (list_empty(&dmar_rmrr_units)) {
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if (list_empty(&dmar_rmrr_units))
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printk(KERN_INFO PREFIX "No RMRR found\n");
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printk(KERN_INFO PREFIX "No RMRR found\n");
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return -ENODEV;
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}
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return 0;
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return 0;
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}
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}
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@ -1040,7 +1040,7 @@ int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
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* @dev: PCI device to handle.
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* @dev: PCI device to handle.
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* @state: PCI state from which device will issue PME#.
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* @state: PCI state from which device will issue PME#.
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*/
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*/
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static bool pci_pme_capable(struct pci_dev *dev, pci_power_t state)
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bool pci_pme_capable(struct pci_dev *dev, pci_power_t state)
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{
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{
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if (!dev->pm_cap)
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if (!dev->pm_cap)
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return false;
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return false;
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@ -1123,17 +1123,10 @@ int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable)
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}
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}
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/**
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/**
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* pci_prepare_to_sleep - prepare PCI device for system-wide transition into a sleep state
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* @dev: Device to handle.
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*
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* Choose the power state appropriate for the device depending on whether
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* it can wake up the system and/or is power manageable by the platform
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* (PCI_D3hot is the default) and put the device into that state.
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*/
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*/
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int pci_prepare_to_sleep(struct pci_dev *dev)
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pci_power_t pci_target_state(struct pci_dev *dev)
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{
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{
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pci_power_t target_state = PCI_D3hot;
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pci_power_t target_state = PCI_D3hot;
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int error;
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if (platform_pci_power_manageable(dev)) {
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if (platform_pci_power_manageable(dev)) {
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/*
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/*
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@ -1160,7 +1153,7 @@ int pci_prepare_to_sleep(struct pci_dev *dev)
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* to generate PME#.
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* to generate PME#.
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*/
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*/
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if (!dev->pm_cap)
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if (!dev->pm_cap)
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return -EIO;
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return PCI_POWER_ERROR;
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if (dev->pme_support) {
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if (dev->pme_support) {
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while (target_state
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while (target_state
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@ -1169,6 +1162,25 @@ int pci_prepare_to_sleep(struct pci_dev *dev)
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}
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}
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}
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}
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return target_state;
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}
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/**
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* pci_prepare_to_sleep - prepare PCI device for system-wide transition into a sleep state
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* @dev: Device to handle.
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*
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* Choose the power state appropriate for the device depending on whether
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* it can wake up the system and/or is power manageable by the platform
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* (PCI_D3hot is the default) and put the device into that state.
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*/
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int pci_prepare_to_sleep(struct pci_dev *dev)
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{
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pci_power_t target_state = pci_target_state(dev);
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int error;
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if (target_state == PCI_POWER_ERROR)
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return -EIO;
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pci_enable_wake(dev, target_state, true);
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pci_enable_wake(dev, target_state, true);
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error = pci_set_power_state(dev, target_state);
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error = pci_set_power_state(dev, target_state);
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@ -1918,7 +1930,9 @@ EXPORT_SYMBOL(pci_select_bars);
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EXPORT_SYMBOL(pci_set_power_state);
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EXPORT_SYMBOL(pci_set_power_state);
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EXPORT_SYMBOL(pci_save_state);
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EXPORT_SYMBOL(pci_save_state);
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EXPORT_SYMBOL(pci_restore_state);
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EXPORT_SYMBOL(pci_restore_state);
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EXPORT_SYMBOL(pci_pme_capable);
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EXPORT_SYMBOL(pci_enable_wake);
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EXPORT_SYMBOL(pci_enable_wake);
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EXPORT_SYMBOL(pci_target_state);
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EXPORT_SYMBOL(pci_prepare_to_sleep);
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EXPORT_SYMBOL(pci_prepare_to_sleep);
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EXPORT_SYMBOL(pci_back_from_sleep);
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EXPORT_SYMBOL(pci_back_from_sleep);
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EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state);
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EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state);
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@ -88,7 +88,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
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if ((pos & 3) && cnt > 2) {
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if ((pos & 3) && cnt > 2) {
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unsigned short val;
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unsigned short val;
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pci_user_read_config_word(dev, pos, &val);
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pci_user_read_config_word(dev, pos, &val);
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__put_user(cpu_to_le16(val), (unsigned short __user *) buf);
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__put_user(cpu_to_le16(val), (__le16 __user *) buf);
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buf += 2;
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buf += 2;
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pos += 2;
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pos += 2;
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cnt -= 2;
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cnt -= 2;
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@ -97,7 +97,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
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while (cnt >= 4) {
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while (cnt >= 4) {
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unsigned int val;
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unsigned int val;
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pci_user_read_config_dword(dev, pos, &val);
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pci_user_read_config_dword(dev, pos, &val);
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__put_user(cpu_to_le32(val), (unsigned int __user *) buf);
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__put_user(cpu_to_le32(val), (__le32 __user *) buf);
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buf += 4;
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buf += 4;
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pos += 4;
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pos += 4;
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cnt -= 4;
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cnt -= 4;
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@ -106,7 +106,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp
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if (cnt >= 2) {
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if (cnt >= 2) {
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unsigned short val;
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unsigned short val;
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pci_user_read_config_word(dev, pos, &val);
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pci_user_read_config_word(dev, pos, &val);
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__put_user(cpu_to_le16(val), (unsigned short __user *) buf);
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__put_user(cpu_to_le16(val), (__le16 __user *) buf);
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buf += 2;
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buf += 2;
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pos += 2;
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pos += 2;
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cnt -= 2;
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cnt -= 2;
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@ -156,8 +156,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
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}
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}
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if ((pos & 3) && cnt > 2) {
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if ((pos & 3) && cnt > 2) {
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unsigned short val;
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__le16 val;
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__get_user(val, (unsigned short __user *) buf);
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__get_user(val, (__le16 __user *) buf);
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pci_user_write_config_word(dev, pos, le16_to_cpu(val));
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pci_user_write_config_word(dev, pos, le16_to_cpu(val));
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buf += 2;
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buf += 2;
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pos += 2;
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pos += 2;
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@ -165,8 +165,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
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}
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}
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while (cnt >= 4) {
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while (cnt >= 4) {
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unsigned int val;
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__le32 val;
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__get_user(val, (unsigned int __user *) buf);
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__get_user(val, (__le32 __user *) buf);
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pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
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pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
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buf += 4;
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buf += 4;
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pos += 4;
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pos += 4;
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@ -174,8 +174,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof
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}
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}
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if (cnt >= 2) {
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if (cnt >= 2) {
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unsigned short val;
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__le16 val;
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__get_user(val, (unsigned short __user *) buf);
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__get_user(val, (__le16 __user *) buf);
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pci_user_write_config_word(dev, pos, le16_to_cpu(val));
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pci_user_write_config_word(dev, pos, le16_to_cpu(val));
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buf += 2;
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buf += 2;
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pos += 2;
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pos += 2;
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@ -638,7 +638,9 @@ int pci_save_state(struct pci_dev *dev);
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int pci_restore_state(struct pci_dev *dev);
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int pci_restore_state(struct pci_dev *dev);
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int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
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int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
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pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
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pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
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bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
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int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
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int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
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pci_power_t pci_target_state(struct pci_dev *dev);
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int pci_prepare_to_sleep(struct pci_dev *dev);
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int pci_prepare_to_sleep(struct pci_dev *dev);
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int pci_back_from_sleep(struct pci_dev *dev);
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int pci_back_from_sleep(struct pci_dev *dev);
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