sh-sci: improve clock framework support
Use enable/disable hooks for clock framework integration. Make sure we control the clock for the serial console as well. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -76,8 +76,10 @@ struct sci_port {
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int break_flag;
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#ifdef CONFIG_HAVE_CLK
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/* Port clock */
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struct clk *clk;
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/* Interface clock */
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struct clk *iclk;
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/* Data clock */
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struct clk *dclk;
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#endif
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struct list_head node;
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};
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@ -166,12 +168,12 @@ static void h8300_sci_config(struct uart_port *port, unsigned int ctrl)
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*mstpcrl &= ~mask;
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}
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static inline void h8300_sci_enable(struct uart_port *port)
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static void h8300_sci_enable(struct uart_port *port)
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{
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h8300_sci_config(port, sci_enable);
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}
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static inline void h8300_sci_disable(struct uart_port *port)
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static void h8300_sci_disable(struct uart_port *port)
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{
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h8300_sci_config(port, sci_disable);
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}
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@ -742,13 +744,34 @@ static int sci_notifier(struct notifier_block *self,
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(phase == CPUFREQ_RESUMECHANGE)) {
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spin_lock_irqsave(&priv->lock, flags);
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list_for_each_entry(sci_port, &priv->ports, node)
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sci_port->port.uartclk = clk_get_rate(sci_port->clk);
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sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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return NOTIFY_OK;
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}
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static void sci_clk_enable(struct uart_port *port)
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{
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struct sci_port *sci_port = to_sci_port(port);
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clk_enable(sci_port->dclk);
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sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
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if (sci_port->iclk)
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clk_enable(sci_port->iclk);
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}
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static void sci_clk_disable(struct uart_port *port)
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{
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struct sci_port *sci_port = to_sci_port(port);
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if (sci_port->iclk)
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clk_disable(sci_port->iclk);
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clk_disable(sci_port->dclk);
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}
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#endif
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static int sci_request_irq(struct sci_port *port)
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@ -880,10 +903,6 @@ static int sci_startup(struct uart_port *port)
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if (s->enable)
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s->enable(port);
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#ifdef CONFIG_HAVE_CLK
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s->clk = clk_get(NULL, "module_clk");
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#endif
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sci_request_irq(s);
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sci_start_tx(port);
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sci_start_rx(port, 1);
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@ -901,11 +920,6 @@ static void sci_shutdown(struct uart_port *port)
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if (s->disable)
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s->disable(port);
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#ifdef CONFIG_HAVE_CLK
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clk_put(s->clk);
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s->clk = NULL;
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#endif
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}
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static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
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@ -1048,7 +1062,8 @@ static struct uart_ops sci_uart_ops = {
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#endif
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};
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static void __devinit sci_init_single(struct sci_port *sci_port,
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static void __devinit sci_init_single(struct platform_device *dev,
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struct sci_port *sci_port,
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unsigned int index,
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struct plat_sci_port *p)
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{
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@ -1064,14 +1079,10 @@ static void __devinit sci_init_single(struct sci_port *sci_port,
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#endif
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sci_port->port.uartclk = CONFIG_CPU_CLOCK;
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#elif defined(CONFIG_HAVE_CLK)
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/*
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* XXX: We should use a proper SCI/SCIF clock
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*/
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{
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struct clk *clk = clk_get(NULL, "module_clk");
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sci_port->port.uartclk = clk_get_rate(clk);
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clk_put(clk);
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}
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sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL;
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sci_port->dclk = clk_get(&dev->dev, "module_clk");
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sci_port->enable = sci_clk_enable;
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sci_port->disable = sci_clk_disable;
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#else
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#error "Need a valid uartclk"
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#endif
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@ -1085,9 +1096,11 @@ static void __devinit sci_init_single(struct sci_port *sci_port,
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sci_port->port.irq = p->irqs[SCIx_TXI_IRQ];
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sci_port->port.flags = p->flags;
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sci_port->port.dev = &dev->dev;
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sci_port->type = sci_port->port.type = p->type;
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memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
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}
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#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
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@ -1111,14 +1124,21 @@ static void serial_console_write(struct console *co, const char *s,
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unsigned count)
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{
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struct uart_port *port = co->data;
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struct sci_port *sci_port = to_sci_port(port);
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unsigned short bits;
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uart_console_write(co->data, s, count, serial_console_putchar);
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if (sci_port->enable)
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sci_port->enable(port);
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uart_console_write(port, s, count, serial_console_putchar);
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/* wait until fifo is empty and last bit has been transmitted */
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bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
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while ((sci_in(port, SCxSR) & bits) != bits)
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cpu_relax();
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if (sci_port->disable);
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sci_port->disable(port);
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}
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static int __init serial_console_setup(struct console *co, char *options)
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@ -1152,11 +1172,6 @@ static int __init serial_console_setup(struct console *co, char *options)
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if (!port->type)
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return -ENODEV;
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#ifdef CONFIG_HAVE_CLK
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if (!sci_port->clk)
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sci_port->clk = clk_get(NULL, "module_clk");
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#endif
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sci_config_port(port, 0);
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if (sci_port->enable)
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@ -1171,6 +1186,7 @@ static int __init serial_console_setup(struct console *co, char *options)
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if (ret == 0)
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sci_stop_rx(port);
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#endif
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/* TODO: disable clock */
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return ret;
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}
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@ -1250,8 +1266,7 @@ static int __devinit sci_probe_single(struct platform_device *dev,
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return 0;
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}
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sciport->port.dev = &dev->dev;
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sci_init_single(sciport, index, p);
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sci_init_single(dev, sciport, index, p);
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ret = uart_add_one_port(&sci_uart_driver, &sciport->port);
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if (ret)
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@ -25,6 +25,7 @@ struct plat_sci_port {
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unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */
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unsigned int type; /* SCI / SCIF / IRDA */
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upf_t flags; /* UPF_* flags */
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char *clk; /* clock string */
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};
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#endif /* __LINUX_SERIAL_SCI_H */
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