iio: adc: at91-sama5d2_adc: add support for suspend/resume functionality
Added support for suspend/resume functionality for the ADC IP in sama5d2 SoC. In order to enter Suspend to ram mode (backup + self refresh mode for memory), in which the ADC IP is no longer powered, we need to reset the pins to default state, for the scenario when they are also used for I2C bus to communicate with the PMIC. On resume, we need to reconfigure the ADC IP registers and reconfigure the trigger registers in the case when the suspend procedure is done while sysfs has the buffer and trigger enabled. In the case the suspend happens exactly during a software triggered conversion, the request will time out, because we reset and power down the ADC. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
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c24f83bad9
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@ -29,6 +29,7 @@
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#include <linux/iio/trigger.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/regulator/consumer.h>
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/* Control Register */
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@ -576,6 +577,20 @@ static const struct iio_info at91_adc_info = {
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.driver_module = THIS_MODULE,
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};
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static void at91_adc_hw_init(struct at91_adc_state *st)
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{
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at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST);
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at91_adc_writel(st, AT91_SAMA5D2_IDR, 0xffffffff);
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/*
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* Transfer field must be set to 2 according to the datasheet and
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* allows different analog settings for each channel.
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*/
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at91_adc_writel(st, AT91_SAMA5D2_MR,
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AT91_SAMA5D2_MR_TRANSFER(2) | AT91_SAMA5D2_MR_ANACH);
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at91_adc_setup_samp_freq(st, st->soc_info.min_sample_rate);
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}
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static int at91_adc_probe(struct platform_device *pdev)
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{
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struct iio_dev *indio_dev;
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@ -694,16 +709,7 @@ static int at91_adc_probe(struct platform_device *pdev)
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goto vref_disable;
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}
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at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST);
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at91_adc_writel(st, AT91_SAMA5D2_IDR, 0xffffffff);
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/*
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* Transfer field must be set to 2 according to the datasheet and
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* allows different analog settings for each channel.
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*/
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at91_adc_writel(st, AT91_SAMA5D2_MR,
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AT91_SAMA5D2_MR_TRANSFER(2) | AT91_SAMA5D2_MR_ANACH);
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at91_adc_setup_samp_freq(st, st->soc_info.min_sample_rate);
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at91_adc_hw_init(st);
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ret = clk_prepare_enable(st->per_clk);
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if (ret)
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@ -759,6 +765,69 @@ static int at91_adc_remove(struct platform_device *pdev)
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return 0;
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}
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static __maybe_unused int at91_adc_suspend(struct device *dev)
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{
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struct iio_dev *indio_dev =
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platform_get_drvdata(to_platform_device(dev));
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struct at91_adc_state *st = iio_priv(indio_dev);
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/*
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* Do a sofware reset of the ADC before we go to suspend.
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* this will ensure that all pins are free from being muxed by the ADC
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* and can be used by for other devices.
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* Otherwise, ADC will hog them and we can't go to suspend mode.
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*/
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at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST);
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clk_disable_unprepare(st->per_clk);
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regulator_disable(st->vref);
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regulator_disable(st->reg);
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return pinctrl_pm_select_sleep_state(dev);
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}
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static __maybe_unused int at91_adc_resume(struct device *dev)
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{
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struct iio_dev *indio_dev =
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platform_get_drvdata(to_platform_device(dev));
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struct at91_adc_state *st = iio_priv(indio_dev);
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int ret;
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ret = pinctrl_pm_select_default_state(dev);
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if (ret)
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goto resume_failed;
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ret = regulator_enable(st->reg);
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if (ret)
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goto resume_failed;
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ret = regulator_enable(st->vref);
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if (ret)
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goto reg_disable_resume;
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ret = clk_prepare_enable(st->per_clk);
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if (ret)
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goto vref_disable_resume;
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at91_adc_hw_init(st);
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/* reconfiguring trigger hardware state */
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if (iio_buffer_enabled(indio_dev))
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at91_adc_configure_trigger(st->trig, true);
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return 0;
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vref_disable_resume:
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regulator_disable(st->vref);
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reg_disable_resume:
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regulator_disable(st->reg);
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resume_failed:
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dev_err(&indio_dev->dev, "failed to resume\n");
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return ret;
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}
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static SIMPLE_DEV_PM_OPS(at91_adc_pm_ops, at91_adc_suspend, at91_adc_resume);
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static const struct of_device_id at91_adc_dt_match[] = {
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{
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.compatible = "atmel,sama5d2-adc",
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@ -774,6 +843,7 @@ static struct platform_driver at91_adc_driver = {
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.driver = {
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.name = "at91-sama5d2_adc",
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.of_match_table = at91_adc_dt_match,
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.pm = &at91_adc_pm_ops,
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},
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};
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module_platform_driver(at91_adc_driver)
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