arm64: dts: ls208xa: comply with the iommu map binding for fsl_mc
fsl-mc bus support the new iommu-map property. Comply to this binding for fsl_mc bus. Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -148,6 +148,7 @@
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
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clockgen: clocking@1300000 {
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compatible = "fsl,ls2080a-clockgen";
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@ -321,6 +322,8 @@
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reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
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<0x00000000 0x08340000 0 0x40000>; /* MC control reg */
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msi-parent = <&its>;
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iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
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dma-coherent;
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#address-cells = <3>;
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#size-cells = <1>;
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@ -424,6 +427,9 @@
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compatible = "arm,mmu-500";
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reg = <0 0x5000000 0 0x800000>;
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#global-interrupts = <12>;
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#iommu-cells = <1>;
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stream-match-mask = <0x7C00>;
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dma-coherent;
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interrupts = <0 13 4>, /* global secure fault */
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<0 14 4>, /* combined secure interrupt */
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<0 15 4>, /* global non-secure fault */
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@ -466,7 +472,6 @@
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<0 204 4>, <0 205 4>,
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<0 206 4>, <0 207 4>,
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<0 208 4>, <0 209 4>;
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mmu-masters = <&fsl_mc 0x300 0>;
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};
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dspi: dspi@2100000 {
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