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RISC-V Fixes for 4.15-rc4 

This pull request contains three small fixes that I'm hoping to get into
 4.15-rc4:
 
 * A fix to a typo in sys_riscv_flush_icache.  This only effects error
   handling, but I think it's a small and obvious enough change that it's
   sane outside the merge window.
 * The addition of smp_mb__after_spinlock(), which was recently removed
   due to an incorrect comment.  This is largly a comment change (as
   there's a big one now), and while it's necessary for complience with
   the RISC-V memory model the lack of this fence shouldn't manifest as a
   bug on current implementations.  Nonetheless, it still seems saner to
   have the fence in 4.15.
 * The removal of some of the HVC_RISCV_SBI driver that snuck into the
   arch port.  This is compile-time dead code in 4.15 (as the driver
   isn't in yet), and during the review process we found a better way to
   implement early printk on RISC-V.  While this change doesn't do
   anything, it will make staging our HVC driver easier: without this
   change the HVC driver we hope to upstream won't build on 4.15 (because
   the 4.15 arch code would reference a function that no longer exists).
 
 Additionally, I'm instituting a bit of a process change so I don't
 submit things too quickly again:
 
 * All the patches I submit during an RC will be from the week before, so
   everyone has gotten a chance to see them and they've made it through
   our autobuilders and integration trees.
 * I'll cherry-pick (single patches) or merge (if it's a patch set) on
   top of the new RC on Monday morning.
 * I'll sign the tag on Monday morning, to let the autobuilders pick up
   exactly what I'm submitting.
 * Assuming nothing goes wrong, I'll mail the pull request out on
   Wednesday.  If something goes wrong, I'll wait at least a day after
   re-spinning the tag to let the autobuilders pick things up.
 
 Hopefully this will avoid any headaches in the future, barring any
 emergency fixes.
 
 I don't think this is the last patch set we'll want for 4.15: I think
 I'll want to remove some of the first-level irqchip driver that snuck in
 as well, which will look a lot like the HVC patch here.  This is pending
 some asm-generic cleanup I'm doing that I haven't quite gotten clean
 enough to send out yet, though, but hopefully it'll be ready by next
 week (and still OK for that late).
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Merge tag 'riscv-for-linus-4.15-rc4-riscv_fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux

Pull RISC-V fixes from Palmer Dabbelt:
 "This contains three small fixes:

   - A fix to a typo in sys_riscv_flush_icache. This only effects error
     handling, but I think it's a small and obvious enough change that
     it's sane outside the merge window.

   - The addition of smp_mb__after_spinlock(), which was recently
     removed due to an incorrect comment. This is largly a comment
     change (as there's a big one now), and while it's necessary for
     complience with the RISC-V memory model the lack of this fence
     shouldn't manifest as a bug on current implementations.
     Nonetheless, it still seems saner to have the fence in 4.15.

   - The removal of some of the HVC_RISCV_SBI driver that snuck into the
     arch port. This is compile-time dead code in 4.15 (as the driver
     isn't in yet), and during the review process we found a better way
     to implement early printk on RISC-V. While this change doesn't do
     anything, it will make staging our HVC driver easier: without this
     change the HVC driver we hope to upstream won't build on 4.15
     (because the 4.15 arch code would reference a function that no
     longer exists).

  I don't think this is the last patch set we'll want for 4.15: I think
  I'll want to remove some of the first-level irqchip driver that snuck
  in as well, which will look a lot like the HVC patch here. This is
  pending some asm-generic cleanup I'm doing that I haven't quite gotten
  clean enough to send out yet, though, but hopefully it'll be ready by
  next week (and still OK for that late)"

 * tag 'riscv-for-linus-4.15-rc4-riscv_fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux:
  RISC-V: Remove unused CONFIG_HVC_RISCV_SBI code
  RISC-V: Resurrect smp_mb__after_spinlock()
  RISC-V: Logical vs Bitwise typo
This commit is contained in:
Linus Torvalds 2017-12-13 20:13:05 -08:00
parent d39a01eff9 27b0174525
commit 4e746cf4f7
3 changed files with 20 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
arch/riscv/include/asm/barrier.h
View File

@ -38,6 +38,25 @@
#define smp_rmb() RISCV_FENCE(r,r)
#define smp_wmb() RISCV_FENCE(w,w)
/*
* This is a very specific barrier: it's currently only used in two places in
* the kernel, both in the scheduler. See include/linux/spinlock.h for the two
* orderings it guarantees, but the "critical section is RCsc" guarantee
* mandates a barrier on RISC-V. The sequence looks like:
*
* lr.aq lock
* sc lock <= LOCKED
* smp_mb__after_spinlock()
* // critical section
* lr lock
* sc.rl lock <= UNLOCKED
*
* The AQ/RL pair provides a RCpc critical section, but there's not really any
* way we can take advantage of that here because the ordering is only enforced
* on that one lock. Thus, we're just doing a full fence.
*/
#define smp_mb__after_spinlock() RISCV_FENCE(rw,rw)
#include <asm-generic/barrier.h>
#endif /* __ASSEMBLY__ */

11
arch/riscv/kernel/setup.c
View File

@ -38,10 +38,6 @@
#include <asm/tlbflush.h>
#include <asm/thread_info.h>
#ifdef CONFIG_HVC_RISCV_SBI
#include <asm/hvc_riscv_sbi.h>
#endif
#ifdef CONFIG_DUMMY_CONSOLE
struct screen_info screen_info = {
.orig_video_lines = 30,
@ -212,13 +208,6 @@ static void __init setup_bootmem(void)
void __init setup_arch(char **cmdline_p)
{
#if defined(CONFIG_HVC_RISCV_SBI)
if (likely(early_console == NULL)) {
early_console = &riscv_sbi_early_console_dev;
register_console(early_console);
}
#endif
#ifdef CONFIG_CMDLINE_BOOL
#ifdef CONFIG_CMDLINE_OVERRIDE
strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);

2
arch/riscv/kernel/sys_riscv.c
View File

@ -70,7 +70,7 @@ SYSCALL_DEFINE3(riscv_flush_icache, uintptr_t, start, uintptr_t, end,
bool local = (flags & SYS_RISCV_FLUSH_ICACHE_LOCAL) != 0;
/* Check the reserved flags. */
if (unlikely(flags & !SYS_RISCV_FLUSH_ICACHE_ALL))
if (unlikely(flags & ~SYS_RISCV_FLUSH_ICACHE_ALL))
return -EINVAL;
flush_icache_mm(mm, local);