ACPICA: Headers: Add support for CSRT and DBG2 ACPI tables.
These tables are defined outside of the ACPI specification. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
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@ -63,6 +63,8 @@
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*/
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*/
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#define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
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#define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
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#define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
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#define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
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#define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */
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#define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */
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#define ACPI_SIG_DBGP "DBGP" /* Debug Port table */
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#define ACPI_SIG_DBGP "DBGP" /* Debug Port table */
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#define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */
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#define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */
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#define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */
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#define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */
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@ -230,6 +232,115 @@ struct acpi_table_boot {
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u8 reserved[3];
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u8 reserved[3];
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};
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};
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/*******************************************************************************
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*
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* CSRT - Core System Resource Table
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* Version 0
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*
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* Conforms to the "Core System Resource Table (CSRT)", November 14, 2011
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*
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******************************************************************************/
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struct acpi_table_csrt {
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struct acpi_table_header header; /* Common ACPI table header */
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};
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/* Resource Group subtable */
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struct acpi_csrt_group {
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u32 length;
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u32 vendor_id;
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u32 subvendor_id;
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u16 device_id;
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u16 subdevice_id;
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u16 revision;
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u16 reserved;
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u32 info_length;
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/* Shared data (length = info_length) immediately follows */
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};
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/* Resource Descriptor subtable */
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struct acpi_csrt_descriptor {
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u32 length;
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u16 type;
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u16 subtype;
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u32 uid;
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/* Resource-specific information immediately follows */
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};
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/* Resource Types */
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#define ACPI_CSRT_TYPE_INTERRUPT 0x0001
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#define ACPI_CSRT_TYPE_TIMER 0x0002
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#define ACPI_CSRT_TYPE_DMA 0x0003
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/* Resource Subtypes */
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#define ACPI_CSRT_XRUPT_LINE 0x0000
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#define ACPI_CSRT_XRUPT_CONTROLLER 0x0001
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#define ACPI_CSRT_TIMER 0x0000
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#define ACPI_CSRT_DMA_CHANNEL 0x0000
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#define ACPI_CSRT_DMA_CONTROLLER 0x0001
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/*******************************************************************************
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*
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* DBG2 - Debug Port Table 2
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* Version 0 (Both main table and subtables)
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*
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* Conforms to "Microsoft Debug Port Table 2 (DBG2)", May 22 2012.
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*
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******************************************************************************/
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struct acpi_table_dbg2 {
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struct acpi_table_header header; /* Common ACPI table header */
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u32 info_offset;
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u32 info_count;
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};
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/* Debug Device Information Subtable */
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struct acpi_dbg2_device {
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u8 revision;
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u16 length;
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u8 register_count; /* Number of base_address registers */
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u16 namepath_length;
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u16 namepath_offset;
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u16 oem_data_length;
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u16 oem_data_offset;
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u16 port_type;
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u16 port_subtype;
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u16 reserved;
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u16 base_address_offset;
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u16 address_size_offset;
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/*
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* Data that follows:
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* base_address (required) - Each in 12-byte Generic Address Structure format.
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* address_size (required) - Array of u32 sizes corresponding to each base_address register.
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* Namepath (required) - Null terminated string. Single dot if not supported.
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* oem_data (optional) - Length is oem_data_length.
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*/
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};
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/* Types for port_type field above */
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#define ACPI_DBG2_SERIAL_PORT 0x8000
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#define ACPI_DBG2_1394_PORT 0x8001
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#define ACPI_DBG2_USB_PORT 0x8002
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#define ACPI_DBG2_NET_PORT 0x8003
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/* Subtypes for port_subtype field above */
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#define ACPI_DBG2_16550_COMPATIBLE 0x0000
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#define ACPI_DBG2_16550_SUBSET 0x0001
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#define ACPI_DBG2_1394_STANDARD 0x0000
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#define ACPI_DBG2_USB_XHCI 0x0000
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#define ACPI_DBG2_USB_EHCI 0x0001
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/*******************************************************************************
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/*******************************************************************************
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*
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*
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* DBGP - Debug Port table
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* DBGP - Debug Port table
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@ -75,7 +75,6 @@
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/* Reserved table signatures */
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/* Reserved table signatures */
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#define ACPI_SIG_CSRT "CSRT" /* Core System Resources Table */
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#define ACPI_SIG_CSRT "CSRT" /* Core System Resources Table */
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#define ACPI_SIG_DBG2 "DBG2" /* Debug Port table 2 */
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#define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */
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#define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */
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#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
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#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
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#define ACPI_SIG_WPBT "WPBT" /* Windows Platform Binary Table */
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#define ACPI_SIG_WPBT "WPBT" /* Windows Platform Binary Table */
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