clocksource: cadence_ttc: Add support for 32bit mode
New TTCs support 32bit mode. Older versions support only 16bit modes. Keep 16bit mode as default and 32bit optional. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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@ -25,7 +25,7 @@
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#include <linux/sched_clock.h>
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/*
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* This driver configures the 2 16-bit count-up timers as follows:
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* This driver configures the 2 16/32-bit count-up timers as follows:
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*
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* T1: Timer 1, clocksource for generic timekeeping
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* T2: Timer 2, clockevent source for hrtimers
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@ -321,7 +321,8 @@ static int ttc_rate_change_clocksource_cb(struct notifier_block *nb,
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return NOTIFY_DONE;
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}
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static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base)
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static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base,
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u32 timer_width)
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{
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struct ttc_timer_clocksource *ttccs;
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int err;
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@ -351,7 +352,7 @@ static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base)
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ttccs->cs.name = "ttc_clocksource";
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ttccs->cs.rating = 200;
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ttccs->cs.read = __ttc_clocksource_read;
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ttccs->cs.mask = CLOCKSOURCE_MASK(16);
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ttccs->cs.mask = CLOCKSOURCE_MASK(timer_width);
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ttccs->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
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/*
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@ -372,7 +373,8 @@ static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base)
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}
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ttc_sched_clock_val_reg = base + TTC_COUNT_VAL_OFFSET;
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sched_clock_register(ttc_sched_clock_read, 16, ttccs->ttc.freq / PRESCALE);
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sched_clock_register(ttc_sched_clock_read, timer_width,
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ttccs->ttc.freq / PRESCALE);
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}
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static int ttc_rate_change_clockevent_cb(struct notifier_block *nb,
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@ -467,6 +469,7 @@ static void __init ttc_timer_init(struct device_node *timer)
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struct clk *clk_cs, *clk_ce;
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static int initialized;
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int clksel;
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u32 timer_width = 16;
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if (initialized)
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return;
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@ -490,6 +493,8 @@ static void __init ttc_timer_init(struct device_node *timer)
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BUG();
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}
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of_property_read_u32(timer, "timer-width", &timer_width);
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clksel = readl_relaxed(timer_baseaddr + TTC_CLK_CNTRL_OFFSET);
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clksel = !!(clksel & TTC_CLK_CNTRL_CSRC_MASK);
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clk_cs = of_clk_get(timer, clksel);
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@ -506,7 +511,7 @@ static void __init ttc_timer_init(struct device_node *timer)
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BUG();
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}
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ttc_setup_clocksource(clk_cs, timer_baseaddr);
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ttc_setup_clocksource(clk_cs, timer_baseaddr, timer_width);
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ttc_setup_clockevent(clk_ce, timer_baseaddr + 4, irq);
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pr_info("%s #0 at %p, irq=%d\n", timer->name, timer_baseaddr, irq);
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