powerpc: Fix "attempt to move .org backwards" error
With recent machine check patch series changes, The exception vectors starting from 0x4300 are now overflowing with allyesconfig. Fix that by moving machine_check_common and machine_check_handle_early code out of that region to make enough room for exception vector area. Fixes this build error reportes by Stephen: arch/powerpc/kernel/exceptions-64s.S: Assembler messages: arch/powerpc/kernel/exceptions-64s.S:958: Error: attempt to move .org backwards arch/powerpc/kernel/exceptions-64s.S:959: Error: attempt to move .org backwards arch/powerpc/kernel/exceptions-64s.S:983: Error: attempt to move .org backwards arch/powerpc/kernel/exceptions-64s.S:984: Error: attempt to move .org backwards arch/powerpc/kernel/exceptions-64s.S:1003: Error: attempt to move .org backwards arch/powerpc/kernel/exceptions-64s.S:1013: Error: attempt to move .org backwards arch/powerpc/kernel/exceptions-64s.S:1014: Error: attempt to move .org backwards arch/powerpc/kernel/exceptions-64s.S:1015: Error: attempt to move .org backwards arch/powerpc/kernel/exceptions-64s.S:1016: Error: attempt to move .org backwards arch/powerpc/kernel/exceptions-64s.S:1017: Error: attempt to move .org backwards arch/powerpc/kernel/exceptions-64s.S:1018: Error: attempt to move .org backwards [Moved the code further down as it introduced link errors due to too long relative branches to the masked interrupts handlers from the exception prologs. Also removed the useless feature section --BenH ] Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Tested-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Mahesh Salgaonkar
Benjamin Herrenschmidt
parent
75eb3d9b60
commit
4e243b79b0
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@ -768,146 +768,6 @@ kvmppc_skip_Hinterrupt:
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STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
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/*
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* Machine check is different because we use a different
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* save area: PACA_EXMC instead of PACA_EXGEN.
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*/
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.align 7
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.globl machine_check_common
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machine_check_common:
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mfspr r10,SPRN_DAR
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std r10,PACA_EXGEN+EX_DAR(r13)
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mfspr r10,SPRN_DSISR
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stw r10,PACA_EXGEN+EX_DSISR(r13)
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EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
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FINISH_NAP
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DISABLE_INTS
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ld r3,PACA_EXGEN+EX_DAR(r13)
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lwz r4,PACA_EXGEN+EX_DSISR(r13)
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std r3,_DAR(r1)
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std r4,_DSISR(r1)
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bl .save_nvgprs
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .machine_check_exception
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b .ret_from_except
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#define MACHINE_CHECK_HANDLER_WINDUP \
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/* Clear MSR_RI before setting SRR0 and SRR1. */\
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li r0,MSR_RI; \
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mfmsr r9; /* get MSR value */ \
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andc r9,r9,r0; \
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mtmsrd r9,1; /* Clear MSR_RI */ \
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/* Move original SRR0 and SRR1 into the respective regs */ \
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ld r9,_MSR(r1); \
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mtspr SPRN_SRR1,r9; \
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ld r3,_NIP(r1); \
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mtspr SPRN_SRR0,r3; \
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ld r9,_CTR(r1); \
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mtctr r9; \
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ld r9,_XER(r1); \
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mtxer r9; \
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ld r9,_LINK(r1); \
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mtlr r9; \
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REST_GPR(0, r1); \
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REST_8GPRS(2, r1); \
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REST_GPR(10, r1); \
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ld r11,_CCR(r1); \
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mtcr r11; \
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/* Decrement paca->in_mce. */ \
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lhz r12,PACA_IN_MCE(r13); \
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subi r12,r12,1; \
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sth r12,PACA_IN_MCE(r13); \
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REST_GPR(11, r1); \
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REST_2GPRS(12, r1); \
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/* restore original r1. */ \
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ld r1,GPR1(r1)
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/*
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* Handle machine check early in real mode. We come here with
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* ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
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*/
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.align 7
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.globl machine_check_handle_early
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machine_check_handle_early:
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BEGIN_FTR_SECTION
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std r0,GPR0(r1) /* Save r0 */
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EXCEPTION_PROLOG_COMMON_3(0x200)
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bl .save_nvgprs
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .machine_check_early
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ld r12,_MSR(r1)
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#ifdef CONFIG_PPC_P7_NAP
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/*
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* Check if thread was in power saving mode. We come here when any
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* of the following is true:
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* a. thread wasn't in power saving mode
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* b. thread was in power saving mode with no state loss or
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* supervisor state loss
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*
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* Go back to nap again if (b) is true.
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*/
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rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
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beq 4f /* No, it wasn;t */
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/* Thread was in power saving mode. Go back to nap again. */
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cmpwi r11,2
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bne 3f
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/* Supervisor state loss */
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li r0,1
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stb r0,PACA_NAPSTATELOST(r13)
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3: bl .machine_check_queue_event
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MACHINE_CHECK_HANDLER_WINDUP
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GET_PACA(r13)
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ld r1,PACAR1(r13)
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b .power7_enter_nap_mode
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4:
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#endif
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/*
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* Check if we are coming from hypervisor userspace. If yes then we
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* continue in host kernel in V mode to deliver the MC event.
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*/
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rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
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beq 5f
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andi. r11,r12,MSR_PR /* See if coming from user. */
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bne 9f /* continue in V mode if we are. */
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5:
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#ifdef CONFIG_KVM_BOOK3S_64_HV
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/*
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* We are coming from kernel context. Check if we are coming from
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* guest. if yes, then we can continue. We will fall through
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* do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
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*/
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lbz r11,HSTATE_IN_GUEST(r13)
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cmpwi r11,0 /* Check if coming from guest */
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bne 9f /* continue if we are. */
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#endif
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/*
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* At this point we are not sure about what context we come from.
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* Queue up the MCE event and return from the interrupt.
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* But before that, check if this is an un-recoverable exception.
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* If yes, then stay on emergency stack and panic.
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*/
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andi. r11,r12,MSR_RI
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bne 2f
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1: addi r3,r1,STACK_FRAME_OVERHEAD
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bl .unrecoverable_exception
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b 1b
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2:
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/*
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* Return from MC interrupt.
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* Queue up the MCE event so that we can log it later, while
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* returning from kernel or opal call.
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*/
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bl .machine_check_queue_event
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MACHINE_CHECK_HANDLER_WINDUP
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rfid
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9:
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/* Deliver the machine check to host kernel in V mode. */
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MACHINE_CHECK_HANDLER_WINDUP
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b machine_check_pSeries
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END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
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STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
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STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
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STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
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@ -1276,6 +1136,30 @@ unrecov_user_slb:
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#endif /* __DISABLED__ */
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/*
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* Machine check is different because we use a different
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* save area: PACA_EXMC instead of PACA_EXGEN.
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*/
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.align 7
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.globl machine_check_common
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machine_check_common:
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mfspr r10,SPRN_DAR
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std r10,PACA_EXGEN+EX_DAR(r13)
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mfspr r10,SPRN_DSISR
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stw r10,PACA_EXGEN+EX_DSISR(r13)
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EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
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FINISH_NAP
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DISABLE_INTS
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ld r3,PACA_EXGEN+EX_DAR(r13)
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lwz r4,PACA_EXGEN+EX_DSISR(r13)
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std r3,_DAR(r1)
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std r4,_DSISR(r1)
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bl .save_nvgprs
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .machine_check_exception
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b .ret_from_except
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.align 7
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.globl alignment_common
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alignment_common:
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@ -1459,6 +1343,120 @@ _GLOBAL(opal_mc_secondary_handler)
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#endif /* CONFIG_PPC_POWERNV */
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#define MACHINE_CHECK_HANDLER_WINDUP \
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/* Clear MSR_RI before setting SRR0 and SRR1. */\
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li r0,MSR_RI; \
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mfmsr r9; /* get MSR value */ \
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andc r9,r9,r0; \
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mtmsrd r9,1; /* Clear MSR_RI */ \
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/* Move original SRR0 and SRR1 into the respective regs */ \
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ld r9,_MSR(r1); \
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mtspr SPRN_SRR1,r9; \
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ld r3,_NIP(r1); \
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mtspr SPRN_SRR0,r3; \
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ld r9,_CTR(r1); \
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mtctr r9; \
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ld r9,_XER(r1); \
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mtxer r9; \
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ld r9,_LINK(r1); \
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mtlr r9; \
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REST_GPR(0, r1); \
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REST_8GPRS(2, r1); \
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REST_GPR(10, r1); \
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ld r11,_CCR(r1); \
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mtcr r11; \
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/* Decrement paca->in_mce. */ \
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lhz r12,PACA_IN_MCE(r13); \
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subi r12,r12,1; \
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sth r12,PACA_IN_MCE(r13); \
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REST_GPR(11, r1); \
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REST_2GPRS(12, r1); \
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/* restore original r1. */ \
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ld r1,GPR1(r1)
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/*
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* Handle machine check early in real mode. We come here with
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* ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
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*/
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.align 7
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.globl machine_check_handle_early
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machine_check_handle_early:
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std r0,GPR0(r1) /* Save r0 */
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EXCEPTION_PROLOG_COMMON_3(0x200)
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bl .save_nvgprs
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .machine_check_early
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ld r12,_MSR(r1)
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#ifdef CONFIG_PPC_P7_NAP
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/*
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* Check if thread was in power saving mode. We come here when any
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* of the following is true:
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* a. thread wasn't in power saving mode
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* b. thread was in power saving mode with no state loss or
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* supervisor state loss
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*
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* Go back to nap again if (b) is true.
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*/
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rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
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beq 4f /* No, it wasn;t */
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/* Thread was in power saving mode. Go back to nap again. */
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cmpwi r11,2
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bne 3f
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/* Supervisor state loss */
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li r0,1
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stb r0,PACA_NAPSTATELOST(r13)
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3: bl .machine_check_queue_event
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MACHINE_CHECK_HANDLER_WINDUP
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GET_PACA(r13)
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ld r1,PACAR1(r13)
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b .power7_enter_nap_mode
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4:
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#endif
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/*
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* Check if we are coming from hypervisor userspace. If yes then we
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* continue in host kernel in V mode to deliver the MC event.
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*/
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rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
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beq 5f
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andi. r11,r12,MSR_PR /* See if coming from user. */
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bne 9f /* continue in V mode if we are. */
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5:
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#ifdef CONFIG_KVM_BOOK3S_64_HV
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/*
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* We are coming from kernel context. Check if we are coming from
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* guest. if yes, then we can continue. We will fall through
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* do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
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*/
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lbz r11,HSTATE_IN_GUEST(r13)
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cmpwi r11,0 /* Check if coming from guest */
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bne 9f /* continue if we are. */
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#endif
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/*
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* At this point we are not sure about what context we come from.
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* Queue up the MCE event and return from the interrupt.
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* But before that, check if this is an un-recoverable exception.
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* If yes, then stay on emergency stack and panic.
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*/
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andi. r11,r12,MSR_RI
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bne 2f
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1: addi r3,r1,STACK_FRAME_OVERHEAD
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bl .unrecoverable_exception
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b 1b
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2:
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/*
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* Return from MC interrupt.
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* Queue up the MCE event so that we can log it later, while
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* returning from kernel or opal call.
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*/
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bl .machine_check_queue_event
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MACHINE_CHECK_HANDLER_WINDUP
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rfid
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9:
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/* Deliver the machine check to host kernel in V mode. */
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MACHINE_CHECK_HANDLER_WINDUP
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b machine_check_pSeries
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/*
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* r13 points to the PACA, r9 contains the saved CR,
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* r12 contain the saved SRR1, SRR0 is still ready for return
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