mmc: sdhci-st: Update the quirks for this controller.
Some additional quirks need to be enabled now we support UHS modes. This avoids some spurious warnings like "Got data interrupt 0x00000002 even though no data operation was in progress" Testing on stih410-b2120 board achieves the following speeds with HS200 eMMC card. max-frequency = 200Mhz /dev/mmcblk0p1: Timing buffered disk reads: 270 MB in 3.02 seconds = 89.54 MB/sec max-frequency = 100Mhz root@debian-armhf:~# hdparm -t /dev/mmcblk0p1 /dev/mmcblk0p1: Timing buffered disk reads: 210 MB in 3.00 seconds = 70.00 MB/sec max-frequency = 50Mhz root@debian-armhf:~# hdparm -t /dev/mmcblk0p1 /dev/mmcblk0p1: Timing buffered disk reads: 118 MB in 3.00 seconds = 39.28 MB/sec This is better than the 3.10 kernel which achieves 77.59 MB/sec at 200Mhz clock (same board/soc/eMMC). Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -340,7 +340,10 @@ static const struct sdhci_ops sdhci_st_ops = {
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static const struct sdhci_pltfm_data sdhci_st_pdata = {
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.ops = &sdhci_st_ops,
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.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
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SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
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SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
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SDHCI_QUIRK_NO_HISPD_BIT,
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.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
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SDHCI_QUIRK2_STOP_WITH_TC,
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};
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