e1000e: fix PHY init workarounds for i217/i218

Toggling the LANPHYPC Value bit cycles the power on the PHY and sets it
back to power-on defaults.  This includes setting it's MAC-PHY messaging
mode to use the PCIe-like interconnect, so the MAC must also be set back
from SMBus mode to PCIe mode otherwise the PHY can be inaccessible.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Bruce Allan 2013-01-04 09:53:19 +00:00 committed by Jeff Kirsher
parent ed1a42656a
commit 4e03510b47
1 changed files with 9 additions and 0 deletions

View File

@ -426,6 +426,15 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
mac_reg |= E1000_FEXTNVM3_PHY_CFG_COUNTER_50MSEC;
ew32(FEXTNVM3, mac_reg);
if (hw->mac.type == e1000_pch_lpt) {
/* Toggling LANPHYPC brings the PHY out of SMBus mode
* So ensure that the MAC is also out of SMBus mode
*/
mac_reg = er32(CTRL_EXT);
mac_reg &= ~E1000_CTRL_EXT_FORCE_SMBUS;
ew32(CTRL_EXT, mac_reg);
}
/* Toggle LANPHYPC Value bit */
mac_reg = er32(CTRL);
mac_reg |= E1000_CTRL_LANPHYPC_OVERRIDE;