mvebu boards changes for v3.12

- convert kirkwood, dove, orion5x to DT init of mv643xx_eth
     - _lots_ of board code removal :)
  - convert kirkwood, dove and orion5x to DT init of clocksource and irqchip
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Merge tag 'boards-3.12' of git://git.infradead.org/linux-mvebu into next/boards

From Jason Cooper:
mvebu boards changes for v3.12

 - convert kirkwood, dove, orion5x to DT init of mv643xx_eth
    - _lots_ of board code removal :)
 - convert kirkwood, dove and orion5x to DT init of clocksource and irqchip

* tag 'boards-3.12' of git://git.infradead.org/linux-mvebu:
  ARM: plat-orion: add reg offset to DT irq driver stub
  ARM: kirkwood: remove obsolete SDIO clock gate workaround
  ARM: kirkwood: convert to DT irqchip and clocksource
  ARM: dove: convert to DT irqchip and clocksource
  ARM: orion5x: update intc device tree node to new reg layout
  ARM: kirkwood: move device tree nodes to DT irqchip and clocksource
  ARM: dove: move device tree nodes to DT irqchip and clocksource
  ARM: orion5x: remove legacy mv643xx_eth board setup
  ARM: kirkwood: remove legacy clk alias for mv643xx_eth
  ARM: kirkwood: remove redundant DT board files
  ARM: dove: remove legacy mv643xx_eth setup
  ARM: orion5x: add gigabit ethernet and mvmdio device tree nodes
  ARM: kirkwood: add gigabit ethernet and mvmdio device tree nodes
  ARM: dove: add gigabit ethernet and mvmdio device tree nodes
  + Linux 3.11-rc2

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-08-11 15:33:54 -07:00
commit 4ddbed9618
721 changed files with 4231 additions and 94868 deletions

View File

@ -267,8 +267,8 @@ Q: If i have some kernel code that needs to be aware of CPU arrival and
A: This is what you would need in your kernel code to receive notifications.
#include <linux/cpu.h>
static int __cpuinit foobar_cpu_callback(struct notifier_block *nfb,
unsigned long action, void *hcpu)
static int foobar_cpu_callback(struct notifier_block *nfb,
unsigned long action, void *hcpu)
{
unsigned int cpu = (unsigned long)hcpu;
@ -285,7 +285,7 @@ A: This is what you would need in your kernel code to receive notifications.
return NOTIFY_OK;
}
static struct notifier_block __cpuinitdata foobar_cpu_notifer =
static struct notifier_block foobar_cpu_notifer =
{
.notifier_call = foobar_cpu_callback,
};

View File

@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 11
SUBLEVEL = 0
EXTRAVERSION = -rc1
EXTRAVERSION = -rc2
NAME = Linux for Workgroups
# *DOCUMENTATION*

View File

@ -116,7 +116,7 @@ wait_boot_cpu_to_stop(int cpuid)
/*
* Where secondaries begin a life of C.
*/
void __cpuinit
void
smp_callin(void)
{
int cpuid = hard_smp_processor_id();
@ -194,7 +194,7 @@ wait_for_txrdy (unsigned long cpumask)
* Send a message to a secondary's console. "START" is one such
* interesting message. ;-)
*/
static void __cpuinit
static void
send_secondary_console_msg(char *str, int cpuid)
{
struct percpu_struct *cpu;
@ -285,7 +285,7 @@ recv_secondary_console_msg(void)
/*
* Convince the console to have a secondary cpu begin execution.
*/
static int __cpuinit
static int
secondary_cpu_start(int cpuid, struct task_struct *idle)
{
struct percpu_struct *cpu;
@ -356,7 +356,7 @@ secondary_cpu_start(int cpuid, struct task_struct *idle)
/*
* Bring one cpu online.
*/
static int __cpuinit
static int
smp_boot_one_cpu(int cpuid, struct task_struct *idle)
{
unsigned long timeout;
@ -472,7 +472,7 @@ smp_prepare_boot_cpu(void)
{
}
int __cpuinit
int
__cpu_up(unsigned int cpu, struct task_struct *tidle)
{
smp_boot_one_cpu(cpu, tidle);

View File

@ -32,7 +32,7 @@
static int opDEC_fix;
static void __cpuinit
static void
opDEC_check(void)
{
__asm__ __volatile__ (
@ -1059,7 +1059,7 @@ give_sigbus:
return;
}
void __cpuinit
void
trap_init(void)
{
/* Tell PAL-code what global pointer we want in the kernel. */

View File

@ -57,6 +57,13 @@
&uart0 { status = "okay"; };
&sata0 { status = "okay"; };
&mdio { status = "okay"; };
&eth { status = "okay"; };
&ethphy {
compatible = "marvell,88e1310";
reg = <1>;
};
&i2c0 {
status = "okay";

View File

@ -30,11 +30,28 @@
marvell,tauros2-cache-features = <0>;
};
intc: interrupt-controller {
timer: timer@20300 {
compatible = "marvell,orion-timer";
reg = <0x20300 0x20>;
interrupt-parent = <&bridge_intc>;
interrupts = <1>, <2>;
clocks = <&core_clk 0>;
};
intc: main-interrupt-ctrl@20200 {
compatible = "marvell,orion-intc";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x20204 0x04>, <0x20214 0x04>;
reg = <0x20200 0x10>, <0x20210 0x10>;
};
bridge_intc: bridge-interrupt-ctrl@20110 {
compatible = "marvell,orion-bridge-intc";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x20110 0x8>;
interrupts = <0>;
marvell,#interrupts = <5>;
};
core_clk: core-clocks@d0214 {
@ -258,5 +275,40 @@
dmacap,xor;
};
};
mdio: mdio-bus@72004 {
compatible = "marvell,orion-mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x72004 0x84>;
interrupts = <30>;
clocks = <&gate_clk 2>;
status = "disabled";
ethphy: ethernet-phy {
device-type = "ethernet-phy";
/* set phy address in board file */
};
};
eth: ethernet-controller@72000 {
compatible = "marvell,orion-eth";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x72000 0x4000>;
clocks = <&gate_clk 2>;
marvell,tx-checksum-limit = <1600>;
status = "disabled";
ethernet-port@0 {
device_type = "network";
compatible = "marvell,orion-eth-port";
reg = <0>;
interrupts = <29>;
/* overwrite MAC address in bootloader */
local-mac-address = [00 00 00 00 00 00];
phy-handle = <&ethphy>;
};
};
};
};

View File

@ -89,3 +89,19 @@
gpios = <&gpio0 17 0>;
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
device_type = "ethernet-phy";
reg = <0>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -87,3 +87,19 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@8 {
device_type = "ethernet-phy";
reg = <8>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -219,3 +219,19 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@8 {
device_type = "ethernet-phy";
reg = <8>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -90,3 +90,20 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
device_type = "ethernet-phy";
compatible = "marvell,88e1116";
reg = <0>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -99,3 +99,31 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
device_type = "ethernet-phy";
reg = <0>;
};
ethphy1: ethernet-phy@1 {
device_type = "ethernet-phy";
reg = <1>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};
&eth1 {
status = "okay";
ethernet1-port@0 {
phy-handle = <&ethphy1>;
};
};

View File

@ -170,3 +170,19 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
device_type = "ethernet-phy";
reg = <0>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -96,3 +96,33 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
device_type = "ethernet-phy";
compatible = "marvell,88e1121";
reg = <0>;
};
ethphy1: ethernet-phy@1 {
device_type = "ethernet-phy";
compatible = "marvell,88e1121";
reg = <1>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};
&eth1 {
status = "okay";
ethernet1-port@0 {
phy-handle = <&ethphy1>;
};
};

View File

@ -122,3 +122,19 @@
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@8 {
device_type = "ethernet-phy";
reg = <8>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -176,3 +176,19 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@11 {
device_type = "ethernet-phy";
reg = <11>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -194,3 +194,27 @@
};
};
};
&mdio {
status = "okay";
ethphy1: ethernet-phy@11 {
device_type = "ethernet-phy";
reg = <11>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
speed = <1000>;
duplex = <1>;
};
};
&eth1 {
status = "okay";
ethernet1-port@0 {
phy-handle = <&ethphy1>;
};
};

View File

@ -30,3 +30,5 @@
};
};
};
&ethphy0 { reg = <8>; };

View File

@ -50,3 +50,19 @@
i2c-gpio,delay-us = <2>; /* ~100 kHz */
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
device_type = "ethernet-phy";
reg = <0>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -207,3 +207,31 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
device_type = "ethernet-phy";
reg = <0>;
};
ethphy1: ethernet-phy@8 {
device_type = "ethernet-phy";
reg = <8>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};
&eth1 {
status = "okay";
ethernet1-port@0 {
phy-handle = <&ethphy1>;
};
};

View File

@ -191,3 +191,30 @@
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@1 {
device_type = "ethernet-phy";
reg = <1>;
};
ethphy1: ethernet-phy@2 {
device_type = "ethernet-phy";
reg = <2>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};
&eth1 {
status = "okay";
ethernet1-port@0 {
phy-handle = <&ethphy1>;
};
};

View File

@ -184,3 +184,19 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
device_type = "ethernet-phy";
reg = <0>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -84,3 +84,19 @@
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy {
device_type = "ethernet-phy";
/* overwrite reg property in board file */
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -30,3 +30,5 @@
};
};
};
&ethphy0 { reg = <8>; };

View File

@ -30,3 +30,5 @@
};
};
};
&ethphy0 { reg = <0>; };

View File

@ -49,3 +49,5 @@
};
};
};
&ethphy0 { reg = <8>; };

View File

@ -50,3 +50,5 @@
};
};
};
&ethphy0 { reg = <0>; };

View File

@ -166,3 +166,19 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
device_type = "ethernet-phy";
reg = <0>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -91,3 +91,19 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
device_type = "ethernet-phy";
reg = <0>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -203,3 +203,19 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
device_type = "ethernet-phy";
reg = <0>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -50,4 +50,6 @@
gpios = <&gpio0 16 1>;
};
};
};
};
&ethphy0 { reg = <8>; };

View File

@ -58,4 +58,6 @@
gpios = <&gpio1 5 1>;
};
};
};
};
&ethphy0 { reg = <0>; };

View File

@ -96,3 +96,19 @@
};
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy {
device_type = "ethernet-phy";
/* overwrite reg property in board file */
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};

View File

@ -20,13 +20,6 @@
gpio0 = &gpio0;
gpio1 = &gpio1;
};
intc: interrupt-controller {
compatible = "marvell,orion-intc", "marvell,intc";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0xf1020204 0x04>,
<0xf1020214 0x04>;
};
ocp@f1000000 {
compatible = "simple-bus";
@ -37,6 +30,30 @@
#address-cells = <1>;
#size-cells = <1>;
timer: timer@20300 {
compatible = "marvell,orion-timer";
reg = <0x20300 0x20>;
interrupt-parent = <&bridge_intc>;
interrupts = <1>, <2>;
clocks = <&core_clk 0>;
};
intc: main-interrupt-ctrl@20200 {
compatible = "marvell,orion-intc";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x20200 0x10>, <0x20210 0x10>;
};
bridge_intc: bridge-interrupt-ctrl@20110 {
compatible = "marvell,orion-bridge-intc";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x20110 0x8>;
interrupts = <1>;
marvell,#interrupts = <6>;
};
core_clk: core-clocks@10030 {
compatible = "marvell,kirkwood-core-clock";
reg = <0x10030 0x4>;
@ -103,9 +120,11 @@
#clock-cells = <1>;
};
wdt@20300 {
wdt: watchdog-timer@20300 {
compatible = "marvell,orion-wdt";
reg = <0x20300 0x28>;
interrupt-parent = <&bridge_intc>;
interrupts = <3>;
clocks = <&gate_clk 7>;
status = "okay";
};
@ -192,5 +211,57 @@
clocks = <&gate_clk 17>;
status = "okay";
};
mdio: mdio-bus@72004 {
compatible = "marvell,orion-mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x72004 0x84>;
interrupts = <46>;
clocks = <&gate_clk 0>;
status = "disabled";
/* add phy nodes in board file */
};
eth0: ethernet-controller@72000 {
compatible = "marvell,kirkwood-eth";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x72000 0x4000>;
clocks = <&gate_clk 0>;
marvell,tx-checksum-limit = <1600>;
status = "disabled";
ethernet0-port@0 {
device_type = "network";
compatible = "marvell,kirkwood-eth-port";
reg = <0>;
interrupts = <11>;
/* overwrite MAC address in bootloader */
local-mac-address = [00 00 00 00 00 00];
/* set phy-handle property in board file */
};
};
eth1: ethernet-controller@76000 {
compatible = "marvell,kirkwood-eth";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x76000 0x4000>;
clocks = <&gate_clk 19>;
marvell,tx-checksum-limit = <1600>;
status = "disabled";
ethernet1-port@0 {
device_type = "network";
compatible = "marvell,kirkwood-eth-port";
reg = <0>;
interrupts = <15>;
/* overwrite MAC address in bootloader */
local-mac-address = [00 00 00 00 00 00];
/* set phy-handle property in board file */
};
};
};
};

View File

@ -53,3 +53,20 @@
};
};
};
&mdio {
status = "okay";
ethphy: ethernet-phy {
device-type = "ethernet-phy";
reg = <8>;
};
};
&eth {
status = "okay";
ethernet-port@0 {
phy-handle = <&ethphy>;
};
};

View File

@ -16,11 +16,12 @@
aliases {
gpio0 = &gpio0;
};
intc: interrupt-controller {
compatible = "marvell,orion-intc", "marvell,intc";
compatible = "marvell,orion-intc";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0xf1020204 0x04>;
reg = <0xf1020200 0x08>;
};
ocp@f1000000 {
@ -132,5 +133,34 @@
interrupts = <28>;
status = "okay";
};
mdio: mdio-bus@72004 {
compatible = "marvell,orion-mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x72004 0x84>;
interrupts = <22>;
status = "disabled";
/* add phy nodes in board file */
};
eth: ethernet-controller@72000 {
compatible = "marvell,orion-eth";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x72000 0x4000>;
marvell,tx-checksum-limit = <1600>;
status = "disabled";
ethernet-port@0 {
device_type = "network";
compatible = "marvell,orion-eth-port";
reg = <0>;
/* overwrite MAC address in bootloader */
local-mac-address = [00 00 00 00 00 00];
/* set phy-handle property in board file */
};
};
};
};

View File

@ -19,7 +19,7 @@
#include <asm/smp.h>
#include <asm/smp_plat.h>
static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned int mpidr, pcpu, pcluster, ret;
extern void secondary_startup(void);
@ -40,7 +40,7 @@ static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *i
return 0;
}
static void __cpuinit mcpm_secondary_init(unsigned int cpu)
static void mcpm_secondary_init(unsigned int cpu)
{
mcpm_cpu_powered_up();
}

View File

@ -29,30 +29,7 @@ CONFIG_MACH_SHEEVAPLUG=y
CONFIG_MACH_T5325=y
CONFIG_MACH_TS219=y
CONFIG_MACH_TS41X=y
CONFIG_MACH_CLOUDBOX_DT=y
CONFIG_MACH_DB88F628X_BP_DT=y
CONFIG_MACH_DLINK_KIRKWOOD_DT=y
CONFIG_MACH_DOCKSTAR_DT=y
CONFIG_MACH_DREAMPLUG_DT=y
CONFIG_MACH_GOFLEXNET_DT=y
CONFIG_MACH_GURUPLUG_DT=y
CONFIG_MACH_IB62X0_DT=y
CONFIG_MACH_ICONNECT_DT=y
CONFIG_MACH_INETSPACE_V2_DT=y
CONFIG_MACH_IOMEGA_IX2_200_DT=y
CONFIG_MACH_KM_KIRKWOOD_DT=y
CONFIG_MACH_LSXL_DT=y
CONFIG_MACH_MPLCEC4_DT=y
CONFIG_MACH_NETSPACE_LITE_V2_DT=y
CONFIG_MACH_NETSPACE_MAX_V2_DT=y
CONFIG_MACH_NETSPACE_MINI_V2_DT=y
CONFIG_MACH_NETSPACE_V2_DT=y
CONFIG_MACH_NSA310_DT=y
CONFIG_MACH_OPENBLOCKS_A6_DT=y
CONFIG_MACH_READYNAS_DT=y
CONFIG_MACH_SHEEVAPLUG_DT=y
CONFIG_MACH_TOPKICK_DT=y
CONFIG_MACH_TS219_DT=y
# CONFIG_CPU_FEROCEON_OLD_ID is not set
CONFIG_PCI_MVEBU=y
CONFIG_PREEMPT=y

View File

@ -89,7 +89,7 @@ static inline u64 arch_counter_get_cntvct(void)
return cval;
}
static inline void __cpuinit arch_counter_set_user_access(void)
static inline void arch_counter_set_user_access(void)
{
u32 cntkctl;

View File

@ -149,7 +149,6 @@ ENDPROC(lookup_processor_type)
* r5 = proc_info pointer in physical address space
* r9 = cpuid (preserved)
*/
__CPUINIT
__lookup_processor_type:
adr r3, __lookup_processor_type_data
ldmia r3, {r4 - r6}

View File

@ -87,7 +87,6 @@ ENTRY(stext)
ENDPROC(stext)
#ifdef CONFIG_SMP
__CPUINIT
ENTRY(secondary_startup)
/*
* Common entry point for secondary CPUs.

View File

@ -343,7 +343,6 @@ __turn_mmu_on_loc:
.long __turn_mmu_on_end
#if defined(CONFIG_SMP)
__CPUINIT
ENTRY(secondary_startup)
/*
* Common entry point for secondary CPUs.

View File

@ -1020,7 +1020,7 @@ out_mdbgen:
cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu));
}
static int __cpuinit dbg_reset_notify(struct notifier_block *self,
static int dbg_reset_notify(struct notifier_block *self,
unsigned long action, void *cpu)
{
if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
@ -1029,7 +1029,7 @@ static int __cpuinit dbg_reset_notify(struct notifier_block *self,
return NOTIFY_OK;
}
static struct notifier_block __cpuinitdata dbg_reset_nb = {
static struct notifier_block dbg_reset_nb = {
.notifier_call = dbg_reset_notify,
};

View File

@ -157,8 +157,8 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
* UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
* junk values out of them.
*/
static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
unsigned long action, void *hcpu)
static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
void *hcpu)
{
if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
return NOTIFY_DONE;
@ -171,7 +171,7 @@ static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
return NOTIFY_OK;
}
static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = {
static struct notifier_block cpu_pmu_hotplug_notifier = {
.notifier_call = cpu_pmu_notify,
};

View File

@ -46,8 +46,7 @@
extern void secondary_startup(void);
static int __cpuinit psci_boot_secondary(unsigned int cpu,
struct task_struct *idle)
static int psci_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
if (psci_ops.cpu_on)
return psci_ops.cpu_on(cpu_logical_map(cpu),

View File

@ -58,7 +58,7 @@ struct secondary_data secondary_data;
* control for which core is the next to come out of the secondary
* boot "holding pen"
*/
volatile int __cpuinitdata pen_release = -1;
volatile int pen_release = -1;
enum ipi_msg_type {
IPI_WAKEUP,
@ -86,7 +86,7 @@ static unsigned long get_arch_pgd(pgd_t *pgd)
return pgdir >> ARCH_PGD_SHIFT;
}
int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
int __cpu_up(unsigned int cpu, struct task_struct *idle)
{
int ret;
@ -138,7 +138,7 @@ void __init smp_init_cpus(void)
smp_ops.smp_init_cpus();
}
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
int boot_secondary(unsigned int cpu, struct task_struct *idle)
{
if (smp_ops.smp_boot_secondary)
return smp_ops.smp_boot_secondary(cpu, idle);
@ -170,7 +170,7 @@ static int platform_cpu_disable(unsigned int cpu)
/*
* __cpu_disable runs on the processor to be shutdown.
*/
int __cpuinit __cpu_disable(void)
int __cpu_disable(void)
{
unsigned int cpu = smp_processor_id();
int ret;
@ -216,7 +216,7 @@ static DECLARE_COMPLETION(cpu_died);
* called on the thread which is asking for a CPU to be shutdown -
* waits until shutdown has completed, or it is timed out.
*/
void __cpuinit __cpu_die(unsigned int cpu)
void __cpu_die(unsigned int cpu)
{
if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
pr_err("CPU%u: cpu didn't die\n", cpu);
@ -306,7 +306,7 @@ void __ref cpu_die(void)
* Called by both boot and secondaries to move global data into
* per-processor storage.
*/
static void __cpuinit smp_store_cpu_info(unsigned int cpuid)
static void smp_store_cpu_info(unsigned int cpuid)
{
struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
@ -322,7 +322,7 @@ static void percpu_timer_setup(void);
* This is the secondary CPU boot entry. We're using this CPUs
* idle thread stack, but a set of temporary page tables.
*/
asmlinkage void __cpuinit secondary_start_kernel(void)
asmlinkage void secondary_start_kernel(void)
{
struct mm_struct *mm = &init_mm;
unsigned int cpu;
@ -521,7 +521,7 @@ static void broadcast_timer_set_mode(enum clock_event_mode mode,
{
}
static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt)
static void broadcast_timer_setup(struct clock_event_device *evt)
{
evt->name = "dummy_timer";
evt->features = CLOCK_EVT_FEAT_ONESHOT |
@ -550,7 +550,7 @@ int local_timer_register(struct local_timer_ops *ops)
}
#endif
static void __cpuinit percpu_timer_setup(void)
static void percpu_timer_setup(void)
{
unsigned int cpu = smp_processor_id();
struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);

View File

@ -187,7 +187,7 @@ core_initcall(twd_cpufreq_init);
#endif
static void __cpuinit twd_calibrate_rate(void)
static void twd_calibrate_rate(void)
{
unsigned long count;
u64 waitjiffies;
@ -265,7 +265,7 @@ static void twd_get_clock(struct device_node *np)
/*
* Setup the local clock events for a CPU.
*/
static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
static int twd_timer_setup(struct clock_event_device *clk)
{
struct clock_event_device **this_cpu_clk;
int cpu = smp_processor_id();
@ -308,7 +308,7 @@ static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
return 0;
}
static struct local_timer_ops twd_lt_ops __cpuinitdata = {
static struct local_timer_ops twd_lt_ops = {
.setup = twd_timer_setup,
.stop = twd_timer_stop,
};

View File

@ -86,7 +86,7 @@ void __init register_current_timer_delay(const struct delay_timer *timer)
}
}
unsigned long __cpuinit calibrate_delay_is_known(void)
unsigned long calibrate_delay_is_known(void)
{
delay_calibrated = true;
return lpj_fine;

View File

@ -23,6 +23,8 @@ config MACH_CM_A510
config MACH_DOVE_DT
bool "Marvell Dove Flattened Device Tree"
select DOVE_CLK
select ORION_IRQCHIP
select ORION_TIMER
select REGULATOR
select REGULATOR_FIXED_VOLTAGE
select USE_OF

View File

@ -1,5 +1,5 @@
obj-y += common.o irq.o
obj-$(CONFIG_DOVE_LEGACY) += mpp.o
obj-y += common.o
obj-$(CONFIG_DOVE_LEGACY) += irq.o mpp.o
obj-$(CONFIG_PCI) += pcie.o
obj-$(CONFIG_MACH_DOVE_DB) += dove-db-setup.o
obj-$(CONFIG_MACH_DOVE_DT) += board-dt.o

View File

@ -10,11 +10,14 @@
#include <linux/init.h>
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/irqchip.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/platform_data/usb-ehci-orion.h>
#include <asm/hardware/cache-tauros2.h>
#include <asm/mach/arch.h>
#include <mach/dove.h>
#include <mach/pm.h>
#include <plat/common.h>
#include <plat/irq.h>
@ -33,10 +36,6 @@ static void __init dove_legacy_clk_init(void)
clkspec.np = np;
clkspec.args_count = 1;
clkspec.args[0] = CLOCK_GATING_BIT_GBE;
orion_clkdev_add(NULL, "mv643xx_eth_port.0",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
orion_clkdev_add("0", "pcie",
of_clk_get_from_provider(&clkspec));
@ -46,15 +45,18 @@ static void __init dove_legacy_clk_init(void)
of_clk_get_from_provider(&clkspec));
}
static void __init dove_of_clk_init(void)
static void __init dove_dt_time_init(void)
{
of_clk_init(NULL);
dove_legacy_clk_init();
clocksource_of_init();
}
static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
};
static void __init dove_dt_init_early(void)
{
mvebu_mbus_init("marvell,dove-mbus",
BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
DOVE_MC_WINS_BASE, DOVE_MC_WINS_SZ);
}
static void __init dove_dt_init(void)
{
@ -65,11 +67,10 @@ static void __init dove_dt_init(void)
#endif
dove_setup_cpu_wins();
/* Setup root of clk tree */
dove_of_clk_init();
/* Setup clocks for legacy devices */
dove_legacy_clk_init();
/* Internal devices not ported to DT yet */
dove_ge00_init(&dove_dt_ge00_data);
dove_pcie_init(1, 1);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@ -82,9 +83,8 @@ static const char * const dove_dt_board_compat[] = {
DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
.map_io = dove_map_io,
.init_early = dove_init_early,
.init_irq = orion_dt_init_irq,
.init_time = dove_timer_init,
.init_early = dove_dt_init_early,
.init_time = dove_dt_time_init,
.init_machine = dove_dt_init,
.restart = dove_restart,
.dt_compat = dove_dt_board_compat,

View File

@ -13,8 +13,6 @@
#include <linux/linkage.h>
#include <linux/init.h>
__CPUINIT
/*
* exynos4 specific entry point for secondary CPUs. This provides
* a "holding pen" into which all secondary cores are held until we're

View File

@ -75,7 +75,7 @@ static void __iomem *scu_base_addr(void)
static DEFINE_SPINLOCK(boot_lock);
static void __cpuinit exynos_secondary_init(unsigned int cpu)
static void exynos_secondary_init(unsigned int cpu)
{
/*
* let the primary processor know we're out of the
@ -90,7 +90,7 @@ static void __cpuinit exynos_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned long timeout;
unsigned long phys_cpu = cpu_logical_map(cpu);

View File

@ -24,7 +24,7 @@
extern void secondary_startup(void);
static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
highbank_set_cpu_jump(cpu, secondary_startup);
arch_send_wakeup_ipi_mask(cpumask_of(cpu));

View File

@ -53,7 +53,7 @@ void imx_scu_standby_enable(void)
writel_relaxed(val, scu_base);
}
static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
imx_set_cpu_jump(cpu, v7_secondary_startup);
imx_enable_cpu(cpu, true);

View File

@ -21,7 +21,7 @@
#include "keystone.h"
static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu,
static int keystone_smp_boot_secondary(unsigned int cpu,
struct task_struct *idle)
{
unsigned long start = virt_to_phys(&secondary_startup);

View File

@ -2,67 +2,81 @@ if ARCH_KIRKWOOD
menu "Marvell Kirkwood Implementations"
config KIRKWOOD_LEGACY
bool
config MACH_D2NET_V2
bool "LaCie d2 Network v2 NAS Board"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
LaCie d2 Network v2 NAS.
config MACH_DOCKSTAR
bool "Seagate FreeAgent DockStar"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
Seagate FreeAgent DockStar.
config MACH_ESATA_SHEEVAPLUG
bool "Marvell eSATA SheevaPlug Reference Board"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
Marvell eSATA SheevaPlug Reference Board.
config MACH_GURUPLUG
bool "Marvell GuruPlug Reference Board"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
Marvell GuruPlug Reference Board.
config MACH_INETSPACE_V2
bool "LaCie Internet Space v2 NAS Board"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
LaCie Internet Space v2 NAS.
config MACH_MV88F6281GTW_GE
bool "Marvell 88F6281 GTW GE Board"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
Marvell 88F6281 GTW GE Board.
config MACH_NET2BIG_V2
bool "LaCie 2Big Network v2 NAS Board"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
LaCie 2Big Network v2 NAS.
config MACH_NET5BIG_V2
bool "LaCie 5Big Network v2 NAS Board"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
LaCie 5Big Network v2 NAS.
config MACH_NETSPACE_MAX_V2
bool "LaCie Network Space Max v2 NAS Board"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
LaCie Network Space Max v2 NAS.
config MACH_NETSPACE_V2
bool "LaCie Network Space v2 NAS Board"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
LaCie Network Space v2 NAS.
config MACH_OPENRD
select KIRKWOOD_LEGACY
bool
config MACH_OPENRD_BASE
@ -88,30 +102,35 @@ config MACH_OPENRD_ULTIMATE
config MACH_RD88F6192_NAS
bool "Marvell RD-88F6192-NAS Reference Board"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
Marvell RD-88F6192-NAS Reference Board.
config MACH_RD88F6281
bool "Marvell RD-88F6281 Reference Board"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
Marvell RD-88F6281 Reference Board.
config MACH_SHEEVAPLUG
bool "Marvell SheevaPlug Reference Board"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
Marvell SheevaPlug Reference Board.
config MACH_T5325
bool "HP t5325 Thin Client"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
HP t5325 Thin Client.
config MACH_TS219
bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and
@ -119,6 +138,7 @@ config MACH_TS219
config MACH_TS41X
bool "QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo NAS"
select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo
@ -129,6 +149,8 @@ comment "Device tree entries"
config ARCH_KIRKWOOD_DT
bool "Marvell Kirkwood Flattened Device Tree"
select KIRKWOOD_CLK
select ORION_IRQCHIP
select ORION_TIMER
select POWER_SUPPLY
select POWER_RESET
select POWER_RESET_GPIO
@ -139,20 +161,6 @@ config ARCH_KIRKWOOD_DT
Say 'Y' here if you want your kernel to support the
Marvell Kirkwood using flattened device tree.
config MACH_CLOUDBOX_DT
bool "LaCie CloudBox NAS (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the LaCie
CloudBox NAS, using Flattened Device Tree.
config MACH_DB88F628X_BP_DT
bool "Marvell DB-88F628x-BP Development Board (Flattened Device Tree)"
help
Say 'Y' here if you want your kernel to support the Marvell
DB-88F6281-BP and DB-88F6282-BP Development Board (Flattened
Device Tree).
config MACH_DLINK_KIRKWOOD_DT
bool "D-Link Kirkwood-based NAS (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
@ -161,163 +169,6 @@ config MACH_DLINK_KIRKWOOD_DT
Kirkwood-based D-Link NASes such as DNS-320 & DNS-325,
using Flattened Device Tree.
config MACH_DOCKSTAR_DT
bool "Seagate FreeAgent Dockstar (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
Seagate FreeAgent Dockstar (Flattened Device Tree).
config MACH_DREAMPLUG_DT
bool "Marvell DreamPlug (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
Marvell DreamPlug (Flattened Device Tree).
config MACH_GOFLEXNET_DT
bool "Seagate GoFlex Net (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
Seagate GoFlex Net (Flattened Device Tree).
config MACH_GURUPLUG_DT
bool "Marvell GuruPlug Reference Board (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
Marvell GuruPlug Reference Board (Flattened Device Tree).
config MACH_IB62X0_DT
bool "RaidSonic IB-NAS6210, IB-NAS6220 (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
RaidSonic IB-NAS6210 & IB-NAS6220 devices, using
Flattened Device Tree.
config MACH_ICONNECT_DT
bool "Iomega Iconnect (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here to enable Iomega Iconnect support.
config MACH_INETSPACE_V2_DT
bool "LaCie Internet Space v2 NAS (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the LaCie
Internet Space v2 NAS, using Flattened Device Tree.
config MACH_IOMEGA_IX2_200_DT
bool "Iomega StorCenter ix2-200 (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
Iomega StorCenter ix2-200 (Flattened Device Tree).
config MACH_KM_KIRKWOOD_DT
bool "Keymile Kirkwood Reference Design (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
Keymile Kirkwood Reference Desgin, using Flattened Device Tree.
config MACH_LSXL_DT
bool "Buffalo Linkstation LS-XHL, LS-CHLv2 (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
select POWER_RESET_RESTART
help
Say 'Y' here if you want your kernel to support the
Buffalo Linkstation LS-XHL & LS-CHLv2 devices, using
Flattened Device Tree.
config MACH_MPLCEC4_DT
bool "MPL CEC4 (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
MPL CEC4 (Flattened Device Tree).
config MACH_NETSPACE_LITE_V2_DT
bool "LaCie Network Space Lite v2 NAS (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the LaCie
Network Space Lite v2 NAS, using Flattened Device Tree.
config MACH_NETSPACE_MAX_V2_DT
bool "LaCie Network Space Max v2 NAS (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the LaCie
Network Space Max v2 NAS, using Flattened Device Tree.
config MACH_NETSPACE_MINI_V2_DT
bool "LaCie Network Space Mini v2 NAS (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the LaCie
Network Space Mini v2 NAS using Flattened Device Tree.
This board is embedded in a product named CloudBox, which
provides automatic backup on a 100GB cloud storage. This
should not confused with a more recent LaCie NAS also named
CloudBox. For this last, the disk capacity is 1TB or above.
config MACH_NETSPACE_V2_DT
bool "LaCie Network Space v2 NAS (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the LaCie
Network Space v2 NAS, using Flattened Device Tree.
config MACH_OPENBLOCKS_A6_DT
bool "Plat'Home OpenBlocks A6 (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
Plat'Home OpenBlocks A6 (Flattened Device Tree).
config MACH_READYNAS_DT
bool "NETGEAR ReadyNAS Duo v2 (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
select ARM_APPENDED_DTB
select ARM_ATAG_DTB_COMPAT
help
Say 'Y' here if you want your kernel to support the
NETGEAR ReadyNAS Duo v2 using Fattened Device Tree.
config MACH_SHEEVAPLUG_DT
bool "Marvell (eSATA) SheevaPlug (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
Marvell (eSATA) SheevaPlug (Flattened Device Tree).
config MACH_TOPKICK_DT
bool "USI Topkick (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
USI Topkick, using Flattened Device Tree
config MACH_TS219_DT
bool "Device Tree for QNAP TS-11X, TS-21X NAS"
select ARCH_KIRKWOOD_DT
select ARM_APPENDED_DTB
select ARM_ATAG_DTB_COMPAT
select POWER_RESET_QNAP
help
Say 'Y' here if you want your kernel to support the QNAP
TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and
TS-219P+ Turbo NAS devices using Fattened Device Tree.
There are two different Device Tree descriptions, depending
on if the device is based on an if the board uses the MV6281
or MV6282. If you have the wrong one, the buttons will not
work.
endmenu
endif

View File

@ -1,5 +1,5 @@
obj-y += common.o irq.o pcie.o mpp.o
obj-y += common.o pcie.o
obj-$(CONFIG_KIRKWOOD_LEGACY) += irq.o mpp.o
obj-$(CONFIG_MACH_D2NET_V2) += d2net_v2-setup.o lacie_v2-common.o
obj-$(CONFIG_MACH_DOCKSTAR) += dockstar-setup.o
obj-$(CONFIG_MACH_ESATA_SHEEVAPLUG) += sheevaplug-setup.o
@ -19,26 +19,4 @@ obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o
obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o
obj-$(CONFIG_ARCH_KIRKWOOD_DT) += board-dt.o
obj-$(CONFIG_MACH_CLOUDBOX_DT) += board-ns2.o
obj-$(CONFIG_MACH_DB88F628X_BP_DT) += board-db88f628x-bp.o
obj-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += board-dnskw.o
obj-$(CONFIG_MACH_DOCKSTAR_DT) += board-dockstar.o
obj-$(CONFIG_MACH_DREAMPLUG_DT) += board-dreamplug.o
obj-$(CONFIG_MACH_GOFLEXNET_DT) += board-goflexnet.o
obj-$(CONFIG_MACH_GURUPLUG_DT) += board-guruplug.o
obj-$(CONFIG_MACH_IB62X0_DT) += board-ib62x0.o
obj-$(CONFIG_MACH_ICONNECT_DT) += board-iconnect.o
obj-$(CONFIG_MACH_INETSPACE_V2_DT) += board-ns2.o
obj-$(CONFIG_MACH_IOMEGA_IX2_200_DT) += board-iomega_ix2_200.o
obj-$(CONFIG_MACH_KM_KIRKWOOD_DT) += board-km_kirkwood.o
obj-$(CONFIG_MACH_LSXL_DT) += board-lsxl.o
obj-$(CONFIG_MACH_MPLCEC4_DT) += board-mplcec4.o
obj-$(CONFIG_MACH_NETSPACE_LITE_V2_DT) += board-ns2.o
obj-$(CONFIG_MACH_NETSPACE_MAX_V2_DT) += board-ns2.o
obj-$(CONFIG_MACH_NETSPACE_MINI_V2_DT) += board-ns2.o
obj-$(CONFIG_MACH_NETSPACE_V2_DT) += board-ns2.o
obj-$(CONFIG_MACH_OPENBLOCKS_A6_DT) += board-openblocks_a6.o
obj-$(CONFIG_MACH_READYNAS_DT) += board-readynas.o
obj-$(CONFIG_MACH_SHEEVAPLUG_DT) += board-sheevaplug.o
obj-$(CONFIG_MACH_TOPKICK_DT) += board-usi_topkick.o
obj-$(CONFIG_MACH_TS219_DT) += board-ts219.o tsx1x-common.o

View File

@ -1,24 +0,0 @@
/*
* Saeed Bishara <saeed@marvell.com>
*
* Marvell DB-88F628{1,2}-BP Development Board Setup
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/of.h>
#include <linux/mv643xx_eth.h>
#include "common.h"
static struct mv643xx_eth_platform_data db88f628x_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
};
void __init db88f628x_init(void)
{
kirkwood_ge00_init(&db88f628x_ge00_data);
}

View File

@ -14,14 +14,9 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mv643xx_eth.h>
#include <linux/gpio.h>
#include "common.h"
static struct mv643xx_eth_platform_data dnskw_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
};
/* Register any GPIO for output and set the value */
static void __init dnskw_gpio_register(unsigned gpio, char *name, int def)
{
@ -36,8 +31,6 @@ static void __init dnskw_gpio_register(unsigned gpio, char *name, int def)
void __init dnskw_init(void)
{
kirkwood_ge00_init(&dnskw_ge00_data);
/* Set NAS to turn back on after a power failure */
dnskw_gpio_register(37, "dnskw:power:recover", 1);
}

View File

@ -1,32 +0,0 @@
/*
* arch/arm/mach-kirkwood/board-dockstar.c
*
* Seagate FreeAgent Dockstar Board Init for drivers not converted to
* flattened device tree yet.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*
* Copied and modified for Seagate GoFlex Net support by
* Joshua Coombs <josh.coombs@gmail.com> based on ArchLinux ARM's
* GoFlex kernel patches.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include "common.h"
static struct mv643xx_eth_platform_data dockstar_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
void __init dockstar_dt_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&dockstar_ge00_data);
}

View File

@ -1,35 +0,0 @@
/*
* Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
*
* arch/arm/mach-kirkwood/board-dreamplug.c
*
* Marvell DreamPlug Reference Board Init for drivers not converted to
* flattened device tree yet.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include <linux/gpio.h>
#include "common.h"
static struct mv643xx_eth_platform_data dreamplug_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
static struct mv643xx_eth_platform_data dreamplug_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(1),
};
void __init dreamplug_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&dreamplug_ge00_data);
kirkwood_ge01_init(&dreamplug_ge01_data);
}

View File

@ -15,6 +15,9 @@
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/dma-mapping.h>
#include <linux/irqchip.h>
#include <linux/kexec.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -49,10 +52,6 @@ static void __init kirkwood_legacy_clk_init(void)
orion_clkdev_add("1", "pcie",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CGC_BIT_SDIO;
orion_clkdev_add(NULL, "mvsdio",
of_clk_get_from_provider(&clkspec));
/*
* The ethernet interfaces forget the MAC address assigned by
* u-boot if the clocks are turned off. Until proper DT support
@ -60,19 +59,24 @@ static void __init kirkwood_legacy_clk_init(void)
*/
clkspec.args[0] = CGC_BIT_GE0;
clk = of_clk_get_from_provider(&clkspec);
orion_clkdev_add(NULL, "mv643xx_eth_port.0", clk);
clk_prepare_enable(clk);
clkspec.args[0] = CGC_BIT_GE1;
clk = of_clk_get_from_provider(&clkspec);
orion_clkdev_add(NULL, "mv643xx_eth_port.1", clk);
clk_prepare_enable(clk);
}
static void __init kirkwood_of_clk_init(void)
static void __init kirkwood_dt_time_init(void)
{
of_clk_init(NULL);
kirkwood_legacy_clk_init();
clocksource_of_init();
}
static void __init kirkwood_dt_init_early(void)
{
mvebu_mbus_init("marvell,kirkwood-mbus",
BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ);
}
static void __init kirkwood_dt_init(void)
@ -93,8 +97,8 @@ static void __init kirkwood_dt_init(void)
kirkwood_cpufreq_init();
/* Setup root of clk tree */
kirkwood_of_clk_init();
/* Setup clocks for legacy devices */
kirkwood_legacy_clk_init();
kirkwood_cpuidle_init();
@ -102,105 +106,22 @@ static void __init kirkwood_dt_init(void)
kexec_reinit = kirkwood_enable_pcie;
#endif
if (of_machine_is_compatible("globalscale,dreamplug"))
dreamplug_init();
if (of_machine_is_compatible("globalscale,guruplug"))
guruplug_dt_init();
if (of_machine_is_compatible("globalscale,sheevaplug"))
sheevaplug_dt_init();
if (of_machine_is_compatible("dlink,dns-kirkwood"))
dnskw_init();
if (of_machine_is_compatible("iom,iconnect"))
iconnect_init();
if (of_machine_is_compatible("raidsonic,ib-nas62x0"))
ib62x0_init();
if (of_machine_is_compatible("qnap,ts219"))
qnap_dt_ts219_init();
if (of_machine_is_compatible("seagate,dockstar"))
dockstar_dt_init();
if (of_machine_is_compatible("seagate,goflexnet"))
goflexnet_init();
if (of_machine_is_compatible("buffalo,lsxl"))
lsxl_init();
if (of_machine_is_compatible("iom,ix2-200"))
iomega_ix2_200_init();
if (of_machine_is_compatible("keymile,km_kirkwood"))
km_kirkwood_init();
if (of_machine_is_compatible("lacie,cloudbox") ||
of_machine_is_compatible("lacie,inetspace_v2") ||
of_machine_is_compatible("lacie,netspace_lite_v2") ||
of_machine_is_compatible("lacie,netspace_max_v2") ||
of_machine_is_compatible("lacie,netspace_mini_v2") ||
of_machine_is_compatible("lacie,netspace_v2"))
ns2_init();
if (of_machine_is_compatible("marvell,db-88f6281-bp") ||
of_machine_is_compatible("marvell,db-88f6282-bp"))
db88f628x_init();
if (of_machine_is_compatible("mpl,cec4"))
mplcec4_init();
if (of_machine_is_compatible("netgear,readynas-duo-v2"))
netgear_readynas_init();
if (of_machine_is_compatible("plathome,openblocks-a6"))
openblocks_a6_init();
if (of_machine_is_compatible("usi,topkick"))
usi_topkick_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char * const kirkwood_dt_board_compat[] = {
"globalscale,dreamplug",
"globalscale,guruplug",
"globalscale,sheevaplug",
"dlink,dns-320",
"dlink,dns-325",
"iom,iconnect",
"raidsonic,ib-nas62x0",
"qnap,ts219",
"seagate,dockstar",
"seagate,goflexnet",
"buffalo,lsxl",
"iom,ix2-200",
"keymile,km_kirkwood",
"lacie,cloudbox",
"lacie,inetspace_v2",
"lacie,netspace_lite_v2",
"lacie,netspace_max_v2",
"lacie,netspace_mini_v2",
"lacie,netspace_v2",
"marvell,db-88f6281-bp",
"marvell,db-88f6282-bp",
"mpl,cec4",
"netgear,readynas-duo-v2",
"plathome,openblocks-a6",
"usi,topkick",
"zyxel,nsa310",
"marvell,kirkwood",
NULL
};
DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)")
/* Maintainer: Jason Cooper <jason@lakedaemon.net> */
.map_io = kirkwood_map_io,
.init_early = kirkwood_init_early,
.init_irq = orion_dt_init_irq,
.init_time = kirkwood_timer_init,
.init_early = kirkwood_dt_init_early,
.init_time = kirkwood_dt_time_init,
.init_machine = kirkwood_dt_init,
.restart = kirkwood_restart,
.dt_compat = kirkwood_dt_board_compat,

View File

@ -1,34 +0,0 @@
/*
* Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
*
* arch/arm/mach-kirkwood/board-goflexnet.c
*
* Seagate GoFlext Net Board Init for drivers not converted to
* flattened device tree yet.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*
* Copied and modified for Seagate GoFlex Net support by
* Joshua Coombs <josh.coombs@gmail.com> based on ArchLinux ARM's
* GoFlex kernel patches.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include "common.h"
static struct mv643xx_eth_platform_data goflexnet_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
void __init goflexnet_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&goflexnet_ge00_data);
}

View File

@ -1,33 +0,0 @@
/*
* arch/arm/mach-kirkwood/board-guruplug.c
*
* Marvell Guruplug Reference Board Init for drivers not converted to
* flattened device tree yet.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include <linux/gpio.h>
#include "common.h"
static struct mv643xx_eth_platform_data guruplug_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
static struct mv643xx_eth_platform_data guruplug_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(1),
};
void __init guruplug_dt_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&guruplug_ge00_data);
kirkwood_ge01_init(&guruplug_ge01_data);
}

View File

@ -1,29 +0,0 @@
/*
* Copyright 2012 (C), Simon Baatz <gmbnomis@gmail.com>
*
* arch/arm/mach-kirkwood/board-ib62x0.c
*
* RaidSonic ICY BOX IB-NAS6210 & IB-NAS6220 init for drivers not
* converted to flattened device tree yet.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include "common.h"
static struct mv643xx_eth_platform_data ib62x0_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
};
void __init ib62x0_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&ib62x0_ge00_data);
}

View File

@ -1,24 +0,0 @@
/*
* arch/arm/mach-kirkwood/board-iconnect.c
*
* Iomega i-connect Board Setup
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/of.h>
#include <linux/mv643xx_eth.h>
#include "common.h"
static struct mv643xx_eth_platform_data iconnect_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(11),
};
void __init iconnect_init(void)
{
kirkwood_ge00_init(&iconnect_ge00_data);
}

View File

@ -1,34 +0,0 @@
/*
* arch/arm/mach-kirkwood/board-iomega_ix2_200.c
*
* Iomega StorCenter ix2-200
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include "common.h"
static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_NONE,
.speed = SPEED_1000,
.duplex = DUPLEX_FULL,
};
static struct mv643xx_eth_platform_data iomega_ix2_200_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(11),
};
void __init iomega_ix2_200_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&iomega_ix2_200_ge00_data);
kirkwood_ge01_init(&iomega_ix2_200_ge01_data);
}

View File

@ -1,44 +0,0 @@
/*
* Copyright 2012 2012 KEYMILE AG, CH-3097 Bern
* Valentin Longchamp <valentin.longchamp@keymile.com>
*
* arch/arm/mach-kirkwood/board-km_kirkwood.c
*
* Keymile km_kirkwood Reference Desing Init for drivers not converted to
* flattened device tree yet.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include <linux/clk.h>
#include <linux/clk-private.h>
#include "common.h"
static struct mv643xx_eth_platform_data km_kirkwood_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
void __init km_kirkwood_init(void)
{
struct clk *sata_clk;
/*
* Our variant of kirkwood (integrated in the Bobcat) hangs on accessing
* SATA bits (14-15) of the Clock Gating Control Register. Since these
* devices are also not present in this variant, their clocks get
* disabled because unused when clk_disable_unused() gets called.
* That's why we change the flags to these clocks to CLK_IGNORE_UNUSED
*/
sata_clk = clk_get_sys("sata_mv.0", "0");
if (!IS_ERR(sata_clk))
sata_clk->flags |= CLK_IGNORE_UNUSED;
sata_clk = clk_get_sys("sata_mv.0", "1");
if (!IS_ERR(sata_clk))
sata_clk->flags |= CLK_IGNORE_UNUSED;
kirkwood_ge00_init(&km_kirkwood_ge00_data);
}

View File

@ -1,36 +0,0 @@
/*
* Copyright 2012 (C), Michael Walle <michael@walle.cc>
*
* arch/arm/mach-kirkwood/board-lsxl.c
*
* Buffalo Linkstation LS-XHL and LS-CHLv2 init for drivers not
* converted to flattened device tree yet.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mv643xx_eth.h>
#include "common.h"
static struct mv643xx_eth_platform_data lsxl_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
static struct mv643xx_eth_platform_data lsxl_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
};
void __init lsxl_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&lsxl_ge00_data);
kirkwood_ge01_init(&lsxl_ge01_data);
}

View File

@ -1,35 +0,0 @@
/*
* Copyright (C) 2012 MPL AG, Switzerland
* Stefan Peter <s.peter@mpl.ch>
*
* arch/arm/mach-kirkwood/board-mplcec4.c
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include "common.h"
static struct mv643xx_eth_platform_data mplcec4_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(1),
};
static struct mv643xx_eth_platform_data mplcec4_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(2),
};
void __init mplcec4_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&mplcec4_ge00_data);
kirkwood_ge01_init(&mplcec4_ge01_data);
}

View File

@ -1,35 +0,0 @@
/*
* Copyright 2012 (C), Simon Guinot <simon.guinot@sequanux.org>
*
* arch/arm/mach-kirkwood/board-ns2.c
*
* LaCie Network Space v2 board (and parents) initialization for drivers
* not converted to flattened device tree yet.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mv643xx_eth.h>
#include <linux/of.h>
#include "common.h"
static struct mv643xx_eth_platform_data ns2_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
};
void __init ns2_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
if (of_machine_is_compatible("lacie,cloudbox") ||
of_machine_is_compatible("lacie,netspace_lite_v2") ||
of_machine_is_compatible("lacie,netspace_mini_v2"))
ns2_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);
kirkwood_ge00_init(&ns2_ge00_data);
}

View File

@ -1,26 +0,0 @@
/*
* Copyright 2012 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* arch/arm/mach-kirkwood/board-openblocks_a6.c
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include "common.h"
static struct mv643xx_eth_platform_data openblocks_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
void __init openblocks_a6_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&openblocks_ge00_data);
}

View File

@ -1,27 +0,0 @@
/*
* NETGEAR ReadyNAS Duo v2 Board setup for drivers not already
* converted to DT.
*
* Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mv643xx_eth.h>
#include <mach/kirkwood.h>
#include "common.h"
static struct mv643xx_eth_platform_data netgear_readynas_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
void __init netgear_readynas_init(void)
{
kirkwood_ge00_init(&netgear_readynas_ge00_data);
}

View File

@ -1,27 +0,0 @@
/*
* arch/arm/mach-kirkwood/board-sheevaplug.c
*
* Marvell Sheevaplug Reference Board Init for drivers not converted to
* flattened device tree yet.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include "common.h"
static struct mv643xx_eth_platform_data sheevaplug_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
void __init sheevaplug_dt_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&sheevaplug_ge00_data);
}

View File

@ -1,40 +0,0 @@
/*
*
* QNAP TS-11x/TS-21x Turbo NAS Board Setup via DT
*
* Copyright (C) 2012 Andrew Lunn <andrew@lunn.ch>
*
* Based on the board file ts219-setup.c:
*
* Copyright (C) 2009 Martin Michlmayr <tbm@cyrius.com>
* Copyright (C) 2008 Byron Bradley <byron.bbradley@gmail.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mv643xx_eth.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/kirkwood.h>
#include "common.h"
static struct mv643xx_eth_platform_data qnap_ts219_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
};
void __init qnap_dt_ts219_init(void)
{
u32 dev, rev;
kirkwood_pcie_id(&dev, &rev);
if (dev == MV88F6282_DEV_ID)
qnap_ts219_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);
kirkwood_ge00_init(&qnap_ts219_ge00_data);
}

View File

@ -1,29 +0,0 @@
/*
* Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
*
* arch/arm/mach-kirkwood/board-usi_topkick.c
*
* USI Topkick Init for drivers not converted to flattened device tree yet.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include <linux/gpio.h>
#include "common.h"
static struct mv643xx_eth_platform_data topkick_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
void __init usi_topkick_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&topkick_ge00_data);
}

View File

@ -59,121 +59,12 @@ void kirkwood_restart(enum reboot_mode, const char *);
void kirkwood_clk_init(void);
/* board init functions for boards not fully converted to fdt */
#ifdef CONFIG_MACH_DREAMPLUG_DT
void dreamplug_init(void);
#else
static inline void dreamplug_init(void) {};
#endif
#ifdef CONFIG_MACH_GURUPLUG_DT
void guruplug_dt_init(void);
#else
static inline void guruplug_dt_init(void) {};
#endif
#ifdef CONFIG_MACH_SHEEVAPLUG_DT
void sheevaplug_dt_init(void);
#else
static inline void sheevaplug_dt_init(void) {};
#endif
#ifdef CONFIG_MACH_TS219_DT
void qnap_dt_ts219_init(void);
#else
static inline void qnap_dt_ts219_init(void) {};
#endif
#ifdef CONFIG_MACH_DLINK_KIRKWOOD_DT
void dnskw_init(void);
#else
static inline void dnskw_init(void) {};
#endif
#ifdef CONFIG_MACH_ICONNECT_DT
void iconnect_init(void);
#else
static inline void iconnect_init(void) {};
#endif
#ifdef CONFIG_MACH_IB62X0_DT
void ib62x0_init(void);
#else
static inline void ib62x0_init(void) {};
#endif
#ifdef CONFIG_MACH_DOCKSTAR_DT
void dockstar_dt_init(void);
#else
static inline void dockstar_dt_init(void) {};
#endif
#ifdef CONFIG_MACH_GOFLEXNET_DT
void goflexnet_init(void);
#else
static inline void goflexnet_init(void) {};
#endif
#ifdef CONFIG_MACH_LSXL_DT
void lsxl_init(void);
#else
static inline void lsxl_init(void) {};
#endif
#ifdef CONFIG_MACH_IOMEGA_IX2_200_DT
void iomega_ix2_200_init(void);
#else
static inline void iomega_ix2_200_init(void) {};
#endif
#ifdef CONFIG_MACH_KM_KIRKWOOD_DT
void km_kirkwood_init(void);
#else
static inline void km_kirkwood_init(void) {};
#endif
#ifdef CONFIG_MACH_DB88F628X_BP_DT
void db88f628x_init(void);
#else
static inline void db88f628x_init(void) {};
#endif
#ifdef CONFIG_MACH_MPLCEC4_DT
void mplcec4_init(void);
#else
static inline void mplcec4_init(void) {};
#endif
#if defined(CONFIG_MACH_INETSPACE_V2_DT) || \
defined(CONFIG_MACH_NETSPACE_V2_DT) || \
defined(CONFIG_MACH_NETSPACE_MAX_V2_DT) || \
defined(CONFIG_MACH_NETSPACE_LITE_V2_DT) || \
defined(CONFIG_MACH_NETSPACE_MINI_V2_DT)
void ns2_init(void);
#else
static inline void ns2_init(void) {};
#endif
#ifdef CONFIG_MACH_OPENBLOCKS_A6_DT
void openblocks_a6_init(void);
#else
static inline void openblocks_a6_init(void) {};
#endif
#ifdef CONFIG_MACH_READYNAS_DT
void netgear_readynas_init(void);
#else
static inline void netgear_readynas_init(void) {};
#endif
#ifdef CONFIG_MACH_TOPKICK_DT
void usi_topkick_init(void);
#else
static inline void usi_topkick_init(void) {};
#endif
#ifdef CONFIG_MACH_CLOUDBOX_DT
void cloudbox_init(void);
#else
static inline void cloudbox_init(void) {};
#endif
/* early init functions not converted to fdt yet */
char *kirkwood_id(void);
void kirkwood_l2_init(void);

View File

@ -11,8 +11,6 @@
#include <linux/linkage.h>
#include <linux/init.h>
__CPUINIT
/*
* MSM specific entry point for secondary CPUs. This provides
* a "holding pen" into which all secondary cores are held until we're

View File

@ -38,7 +38,7 @@ static inline int get_core_count(void)
return ((read_cpuid_id() >> 4) & 3) + 1;
}
static void __cpuinit msm_secondary_init(unsigned int cpu)
static void msm_secondary_init(unsigned int cpu)
{
/*
* let the primary processor know we're out of the
@ -54,7 +54,7 @@ static void __cpuinit msm_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
static __cpuinit void prepare_cold_cpu(unsigned int cpu)
static void prepare_cold_cpu(unsigned int cpu)
{
int ret;
ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
@ -73,7 +73,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu)
"address\n");
}
static int __cpuinit msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned long timeout;
static int cold_boot_done;

View File

@ -139,7 +139,7 @@ static struct clocksource msm_clocksource = {
};
#ifdef CONFIG_LOCAL_TIMERS
static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt)
static int msm_local_timer_setup(struct clock_event_device *evt)
{
/* Use existing clock_event for cpu 0 */
if (!smp_processor_id())
@ -164,7 +164,7 @@ static void msm_local_timer_stop(struct clock_event_device *evt)
disable_percpu_irq(evt->irq);
}
static struct local_timer_ops msm_local_timer_ops __cpuinitdata = {
static struct local_timer_ops msm_local_timer_ops = {
.setup = msm_local_timer_setup,
.stop = msm_local_timer_stop,
};

View File

@ -28,7 +28,7 @@
#include <asm/cacheflush.h>
#include "armada-370-xp.h"
unsigned long __cpuinitdata coherency_phys_base;
unsigned long coherency_phys_base;
static void __iomem *coherency_base;
static void __iomem *coherency_cpu_base;

View File

@ -21,8 +21,6 @@
#include <linux/linkage.h>
#include <linux/init.h>
__CPUINIT
/*
* Armada XP specific entry point for secondary CPUs.
* We add the CPU to the coherency fabric and then jump to secondary

View File

@ -71,13 +71,12 @@ void __init set_secondary_cpus_clock(void)
}
}
static void __cpuinit armada_xp_secondary_init(unsigned int cpu)
static void armada_xp_secondary_init(unsigned int cpu)
{
armada_xp_mpic_smp_cpu_init();
}
static int __cpuinit armada_xp_boot_secondary(unsigned int cpu,
struct task_struct *idle)
static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
pr_info("Booting CPU %d\n", cpu);

View File

@ -20,8 +20,6 @@
#include "omap44xx.h"
__CPUINIT
/* Physical address needed since MMU not enabled yet on secondary core */
#define AUX_CORE_BOOT0_PA 0x48281800

View File

@ -291,7 +291,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
* @cpu : CPU ID
* @power_state: CPU low power state.
*/
int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
{
struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu);
unsigned int cpu_state = 0;

View File

@ -51,7 +51,7 @@ void __iomem *omap4_get_scu_base(void)
return scu_base;
}
static void __cpuinit omap4_secondary_init(unsigned int cpu)
static void omap4_secondary_init(unsigned int cpu)
{
/*
* Configure ACTRL and enable NS SMP bit access on CPU1 on HS device.
@ -72,7 +72,7 @@ static void __cpuinit omap4_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
static struct clockdomain *cpu1_clkdm;
static bool booted;

View File

@ -323,8 +323,8 @@ static void irq_save_secure_context(void)
#endif
#ifdef CONFIG_HOTPLUG_CPU
static int __cpuinit irq_cpu_hotplug_notify(struct notifier_block *self,
unsigned long action, void *hcpu)
static int irq_cpu_hotplug_notify(struct notifier_block *self,
unsigned long action, void *hcpu)
{
unsigned int cpu = (unsigned int)hcpu;

View File

@ -23,8 +23,8 @@
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/mbus.h>
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/leds.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
@ -95,14 +95,6 @@ static struct platform_device edmini_v2_nor_flash = {
.resource = &edmini_v2_nor_flash_resource,
};
/*****************************************************************************
* Ethernet
****************************************************************************/
static struct mv643xx_eth_platform_data edmini_v2_eth_data = {
.phy_addr = 8,
};
/*****************************************************************************
* RTC 5C372a on I2C bus
****************************************************************************/
@ -152,7 +144,6 @@ void __init edmini_v2_init(void)
* Configure peripherals.
*/
orion5x_ehci0_init();
orion5x_eth_init(&edmini_v2_eth_data);
mvebu_mbus_add_window("devbus-boot", EDMINI_V2_NOR_BOOT_BASE,
EDMINI_V2_NOR_BOOT_SIZE);

View File

@ -9,8 +9,6 @@
#include <linux/linkage.h>
#include <linux/init.h>
__CPUINIT
/*
* SIRFSOC specific entry point for secondary CPUs. This provides
* a "holding pen" into which all secondary cores are held until we're

View File

@ -44,7 +44,7 @@ void __init sirfsoc_map_scu(void)
scu_base = (void __iomem *)SIRFSOC_VA(base);
}
static void __cpuinit sirfsoc_secondary_init(unsigned int cpu)
static void sirfsoc_secondary_init(unsigned int cpu)
{
/*
* let the primary processor know we're out of the
@ -65,7 +65,7 @@ static struct of_device_id rsc_ids[] = {
{},
};
static int __cpuinit sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned long timeout;
struct device_node *np;

View File

@ -208,7 +208,7 @@ config S3C24XX_GPIO_EXTRA128
config S3C24XX_PLL
bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
depends on ARM_S3C24XX
depends on ARM_S3C24XX_CPUFREQ
help
Compile in support for changing the PLL frequency from the
S3C24XX series CPUfreq driver. The PLL takes time to settle

View File

@ -23,7 +23,6 @@
#include <linux/init.h>
#include <asm/memory.h>
__CPUINIT
/*
* Boot code for secondary CPUs.
*

View File

@ -14,8 +14,6 @@
#include <linux/init.h>
#include <asm/memory.h>
__CPUINIT
ENTRY(shmobile_invalidate_start)
bl v7_invalidate_l1
b secondary_startup

View File

@ -30,7 +30,7 @@
#define EMEV2_SCU_BASE 0x1e000000
static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu)));
return 0;

View File

@ -81,7 +81,7 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu)
return ret ? ret : 1;
}
static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
struct r8a7779_pm_ch *ch = NULL;
int ret = -EIO;

View File

@ -48,7 +48,7 @@ void __init sh73a0_register_twd(void)
}
#endif
static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
cpu = cpu_logical_map(cpu);

View File

@ -10,7 +10,6 @@
#include <linux/linkage.h>
#include <linux/init.h>
__CPUINIT
.arch armv7-a
ENTRY(secondary_trampoline)

View File

@ -29,7 +29,7 @@
#include "core.h"
static int __cpuinit socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;

View File

@ -37,7 +37,7 @@ void __init spear13xx_l2x0_init(void);
void spear_restart(enum reboot_mode, const char *);
void spear13xx_secondary_startup(void);
void __cpuinit spear13xx_cpu_die(unsigned int cpu);
void spear13xx_cpu_die(unsigned int cpu);
extern struct smp_operations spear13xx_smp_ops;

View File

@ -24,7 +24,7 @@ static DEFINE_SPINLOCK(boot_lock);
static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
static void __cpuinit spear13xx_secondary_init(unsigned int cpu)
static void spear13xx_secondary_init(unsigned int cpu)
{
/*
* let the primary processor know we're out of the
@ -40,7 +40,7 @@ static void __cpuinit spear13xx_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
static int __cpuinit spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned long timeout;

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