x86/PCI/ACPI: Use common interface to support PCI host bridge
Use common interface to simplify ACPI PCI host bridge implementation. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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a3669868d9
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4d6b4e69a2
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@ -4,16 +4,15 @@
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#include <linux/irq.h>
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#include <linux/dmi.h>
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#include <linux/slab.h>
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#include <linux/pci-acpi.h>
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#include <asm/numa.h>
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#include <asm/pci_x86.h>
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struct pci_root_info {
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struct acpi_device *bridge;
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char name[16];
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struct acpi_pci_root_info common;
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struct pci_sysdata sd;
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#ifdef CONFIG_PCI_MMCONFIG
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bool mcfg_added;
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u16 segment;
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u8 start_bus;
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u8 end_bus;
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#endif
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@ -178,15 +177,18 @@ static int check_segment(u16 seg, struct device *dev, char *estr)
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return 0;
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}
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static int setup_mcfg_map(struct pci_root_info *info, u16 seg, u8 start,
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u8 end, phys_addr_t addr)
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static int setup_mcfg_map(struct acpi_pci_root_info *ci)
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{
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int result;
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struct device *dev = &info->bridge->dev;
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int result, seg;
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struct pci_root_info *info;
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struct acpi_pci_root *root = ci->root;
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struct device *dev = &ci->bridge->dev;
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info->start_bus = start;
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info->end_bus = end;
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info = container_of(ci, struct pci_root_info, common);
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info->start_bus = (u8)root->secondary.start;
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info->end_bus = (u8)root->secondary.end;
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info->mcfg_added = false;
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seg = info->sd.domain;
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/* return success if MMCFG is not in use */
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if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
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@ -195,7 +197,8 @@ static int setup_mcfg_map(struct pci_root_info *info, u16 seg, u8 start,
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if (!(pci_probe & PCI_PROBE_MMCONF))
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return check_segment(seg, dev, "MMCONFIG is disabled,");
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result = pci_mmconfig_insert(dev, seg, start, end, addr);
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result = pci_mmconfig_insert(dev, seg, info->start_bus, info->end_bus,
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root->mcfg_addr);
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if (result == 0) {
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/* enable MMCFG if it hasn't been enabled yet */
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if (raw_pci_ext_ops == NULL)
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@ -208,134 +211,55 @@ static int setup_mcfg_map(struct pci_root_info *info, u16 seg, u8 start,
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return 0;
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}
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static void teardown_mcfg_map(struct pci_root_info *info)
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static void teardown_mcfg_map(struct acpi_pci_root_info *ci)
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{
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struct pci_root_info *info;
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info = container_of(ci, struct pci_root_info, common);
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if (info->mcfg_added) {
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pci_mmconfig_delete(info->segment, info->start_bus,
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info->end_bus);
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pci_mmconfig_delete(info->sd.domain,
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info->start_bus, info->end_bus);
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info->mcfg_added = false;
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}
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}
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#else
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static int setup_mcfg_map(struct pci_root_info *info,
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u16 seg, u8 start, u8 end,
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phys_addr_t addr)
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static int setup_mcfg_map(struct acpi_pci_root_info *ci)
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{
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return 0;
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}
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static void teardown_mcfg_map(struct pci_root_info *info)
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static void teardown_mcfg_map(struct acpi_pci_root_info *ci)
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{
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}
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#endif
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static void validate_resources(struct device *dev, struct list_head *crs_res,
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unsigned long type)
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static int pci_acpi_root_get_node(struct acpi_pci_root *root)
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{
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LIST_HEAD(list);
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struct resource *res1, *res2, *root = NULL;
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struct resource_entry *tmp, *entry, *entry2;
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int busnum = root->secondary.start;
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struct acpi_device *device = root->device;
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int node = acpi_get_node(device->handle);
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BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
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root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
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list_splice_init(crs_res, &list);
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resource_list_for_each_entry_safe(entry, tmp, &list) {
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bool free = false;
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resource_size_t end;
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res1 = entry->res;
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if (!(res1->flags & type))
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goto next;
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/* Exclude non-addressable range or non-addressable portion */
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end = min(res1->end, root->end);
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if (end <= res1->start) {
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dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
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res1);
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free = true;
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goto next;
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} else if (res1->end != end) {
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dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
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res1, (unsigned long long)end + 1,
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(unsigned long long)res1->end);
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res1->end = end;
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}
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resource_list_for_each_entry(entry2, crs_res) {
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res2 = entry2->res;
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if (!(res2->flags & type))
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continue;
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/*
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* I don't like throwing away windows because then
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* our resources no longer match the ACPI _CRS, but
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* the kernel resource tree doesn't allow overlaps.
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*/
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if (resource_overlaps(res1, res2)) {
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res2->start = min(res1->start, res2->start);
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res2->end = max(res1->end, res2->end);
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dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
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res2, res1);
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free = true;
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goto next;
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}
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}
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next:
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resource_list_del(entry);
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if (free)
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resource_list_free_entry(entry);
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else
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resource_list_add_tail(entry, crs_res);
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if (node == NUMA_NO_NODE) {
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node = x86_pci_root_bus_node(busnum);
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if (node != 0 && node != NUMA_NO_NODE)
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dev_info(&device->dev, FW_BUG "no _PXM; falling back to node %d from hardware (may be inconsistent with ACPI node numbers)\n",
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node);
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}
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if (node != NUMA_NO_NODE && !node_online(node))
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node = NUMA_NO_NODE;
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return node;
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}
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static void add_resources(struct pci_root_info *info,
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struct list_head *resources,
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struct list_head *crs_res)
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static int pci_acpi_root_init_info(struct acpi_pci_root_info *ci)
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{
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struct resource_entry *entry, *tmp;
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struct resource *res, *conflict, *root = NULL;
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validate_resources(&info->bridge->dev, crs_res, IORESOURCE_MEM);
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validate_resources(&info->bridge->dev, crs_res, IORESOURCE_IO);
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resource_list_for_each_entry_safe(entry, tmp, crs_res) {
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res = entry->res;
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if (res->flags & IORESOURCE_MEM)
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root = &iomem_resource;
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else if (res->flags & IORESOURCE_IO)
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root = &ioport_resource;
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else
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BUG_ON(res);
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conflict = insert_resource_conflict(root, res);
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if (conflict) {
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dev_info(&info->bridge->dev,
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"ignoring host bridge window %pR (conflicts with %s %pR)\n",
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res, conflict->name, conflict);
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resource_list_destroy_entry(entry);
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}
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}
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list_splice_tail(crs_res, resources);
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return setup_mcfg_map(ci);
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}
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static void release_pci_root_info(struct pci_host_bridge *bridge)
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static void pci_acpi_root_release_info(struct acpi_pci_root_info *ci)
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{
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struct resource *res;
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struct resource_entry *entry;
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struct pci_root_info *info = bridge->release_data;
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resource_list_for_each_entry(entry, &bridge->windows) {
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res = entry->res;
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if (res->parent &&
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(res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
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release_resource(res);
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}
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teardown_mcfg_map(info);
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kfree(info);
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teardown_mcfg_map(ci);
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kfree(container_of(ci, struct pci_root_info, common));
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}
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/*
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res->start == 0xCF8 && res->end == 0xCFF;
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}
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static void probe_pci_root_info(struct pci_root_info *info,
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struct acpi_device *device,
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int busnum, int domain,
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struct list_head *list)
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static int pci_acpi_root_prepare_resources(struct acpi_pci_root_info *ci)
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{
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int ret;
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struct acpi_device *device = ci->bridge;
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int busnum = ci->root->secondary.start;
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struct resource_entry *entry, *tmp;
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int status;
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sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
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info->bridge = device;
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ret = acpi_dev_get_resources(device, list,
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acpi_dev_filter_resource_type_cb,
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(void *)(IORESOURCE_IO | IORESOURCE_MEM));
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if (ret < 0)
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dev_warn(&device->dev,
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"failed to parse _CRS method, error code %d\n", ret);
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else if (ret == 0)
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dev_dbg(&device->dev,
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"no IO and memory resources present in _CRS\n");
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else
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resource_list_for_each_entry_safe(entry, tmp, list) {
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if ((entry->res->flags & IORESOURCE_DISABLED) ||
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resource_is_pcicfg_ioport(entry->res))
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status = acpi_pci_probe_root_resources(ci);
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if (pci_use_crs) {
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resource_list_for_each_entry_safe(entry, tmp, &ci->resources)
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if (resource_is_pcicfg_ioport(entry->res))
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resource_list_destroy_entry(entry);
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else
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entry->res->name = info->name;
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}
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return status;
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}
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resource_list_for_each_entry_safe(entry, tmp, &ci->resources) {
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dev_printk(KERN_DEBUG, &device->dev,
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"host bridge window %pR (ignored)\n", entry->res);
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resource_list_destroy_entry(entry);
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}
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x86_pci_root_bus_resources(busnum, &ci->resources);
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return 0;
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}
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static struct acpi_pci_root_ops acpi_pci_root_ops = {
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.pci_ops = &pci_root_ops,
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.init_info = pci_acpi_root_init_info,
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.release_info = pci_acpi_root_release_info,
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.prepare_resources = pci_acpi_root_prepare_resources,
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};
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struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
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{
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struct acpi_device *device = root->device;
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struct pci_root_info *info;
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int domain = root->segment;
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int busnum = root->secondary.start;
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struct resource_entry *res_entry;
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LIST_HEAD(crs_res);
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LIST_HEAD(resources);
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int node = pci_acpi_root_get_node(root);
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struct pci_bus *bus;
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struct pci_sysdata *sd;
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int node;
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if (pci_ignore_seg)
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root->segment = domain = 0;
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return NULL;
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}
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node = acpi_get_node(device->handle);
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if (node == NUMA_NO_NODE) {
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node = x86_pci_root_bus_node(busnum);
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if (node != 0 && node != NUMA_NO_NODE)
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dev_info(&device->dev, FW_BUG "no _PXM; falling back to node %d from hardware (may be inconsistent with ACPI node numbers)\n",
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node);
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}
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if (node != NUMA_NO_NODE && !node_online(node))
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node = NUMA_NO_NODE;
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info = kzalloc_node(sizeof(*info), GFP_KERNEL, node);
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if (!info) {
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printk(KERN_WARNING "pci_bus %04x:%02x: "
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"ignored (out of memory)\n", domain, busnum);
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return NULL;
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}
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sd = &info->sd;
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sd->domain = domain;
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sd->node = node;
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sd->companion = device;
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bus = pci_find_bus(domain, busnum);
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if (bus) {
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/*
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* If the desired bus has been scanned already, replace
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* its bus->sysdata.
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*/
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memcpy(bus->sysdata, sd, sizeof(*sd));
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kfree(info);
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struct pci_sysdata sd = {
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.domain = domain,
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.node = node,
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.companion = root->device
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};
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memcpy(bus->sysdata, &sd, sizeof(sd));
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} else {
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/* insert busn res at first */
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pci_add_resource(&resources, &root->secondary);
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struct pci_root_info *info;
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/*
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* _CRS with no apertures is normal, so only fall back to
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* defaults or native bridge info if we're ignoring _CRS.
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*/
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probe_pci_root_info(info, device, busnum, domain, &crs_res);
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if (pci_use_crs) {
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add_resources(info, &resources, &crs_res);
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} else {
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resource_list_for_each_entry(res_entry, &crs_res)
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dev_printk(KERN_DEBUG, &device->dev,
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"host bridge window %pR (ignored)\n",
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res_entry->res);
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resource_list_free(&crs_res);
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x86_pci_root_bus_resources(busnum, &resources);
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}
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if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
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(u8)root->secondary.end, root->mcfg_addr))
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bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
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sd, &resources);
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if (bus) {
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pci_scan_child_bus(bus);
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pci_set_host_bridge_release(
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to_pci_host_bridge(bus->bridge),
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release_pci_root_info, info);
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} else {
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resource_list_free(&resources);
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teardown_mcfg_map(info);
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kfree(info);
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info = kzalloc_node(sizeof(*info), GFP_KERNEL, node);
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if (!info)
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dev_err(&root->device->dev,
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"pci_bus %04x:%02x: ignored (out of memory)\n",
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domain, busnum);
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else {
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info->sd.domain = domain;
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info->sd.node = node;
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info->sd.companion = root->device;
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bus = acpi_pci_root_create(root, &acpi_pci_root_ops,
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&info->common, &info->sd);
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}
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}
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@ -487,9 +370,6 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
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pcie_bus_configure_settings(child);
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}
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if (bus && node != NUMA_NO_NODE)
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dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
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return bus;
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}
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