KVM: MMU: make use of ->root_level in reset_rsvds_bits_mask
The reset_rsvds_bits_mask() function can use the guest walker's root level number instead of using a separate 'level' variable. Signed-off-by: Davidlohr Bueso <dave@gnu.org> Signed-off-by: Avi Kivity <avi@redhat.com>
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62079d8a43
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4d6931c380
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@ -3185,15 +3185,14 @@ static bool sync_mmio_spte(u64 *sptep, gfn_t gfn, unsigned access,
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#undef PTTYPE
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#undef PTTYPE
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static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
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static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
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struct kvm_mmu *context,
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struct kvm_mmu *context)
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int level)
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{
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{
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int maxphyaddr = cpuid_maxphyaddr(vcpu);
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int maxphyaddr = cpuid_maxphyaddr(vcpu);
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u64 exb_bit_rsvd = 0;
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u64 exb_bit_rsvd = 0;
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if (!context->nx)
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if (!context->nx)
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exb_bit_rsvd = rsvd_bits(63, 63);
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exb_bit_rsvd = rsvd_bits(63, 63);
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switch (level) {
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switch (context->root_level) {
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case PT32_ROOT_LEVEL:
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case PT32_ROOT_LEVEL:
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/* no rsvd bits for 2 level 4K page table entries */
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/* no rsvd bits for 2 level 4K page table entries */
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context->rsvd_bits_mask[0][1] = 0;
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context->rsvd_bits_mask[0][1] = 0;
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@ -3251,8 +3250,9 @@ static int paging64_init_context_common(struct kvm_vcpu *vcpu,
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int level)
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int level)
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{
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{
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context->nx = is_nx(vcpu);
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context->nx = is_nx(vcpu);
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context->root_level = level;
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reset_rsvds_bits_mask(vcpu, context, level);
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reset_rsvds_bits_mask(vcpu, context);
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ASSERT(is_pae(vcpu));
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ASSERT(is_pae(vcpu));
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context->new_cr3 = paging_new_cr3;
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context->new_cr3 = paging_new_cr3;
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@ -3262,7 +3262,6 @@ static int paging64_init_context_common(struct kvm_vcpu *vcpu,
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context->invlpg = paging64_invlpg;
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context->invlpg = paging64_invlpg;
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context->update_pte = paging64_update_pte;
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context->update_pte = paging64_update_pte;
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context->free = paging_free;
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context->free = paging_free;
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context->root_level = level;
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context->shadow_root_level = level;
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context->shadow_root_level = level;
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context->root_hpa = INVALID_PAGE;
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context->root_hpa = INVALID_PAGE;
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context->direct_map = false;
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context->direct_map = false;
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@ -3279,8 +3278,9 @@ static int paging32_init_context(struct kvm_vcpu *vcpu,
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struct kvm_mmu *context)
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struct kvm_mmu *context)
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{
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{
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context->nx = false;
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context->nx = false;
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context->root_level = PT32_ROOT_LEVEL;
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reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
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reset_rsvds_bits_mask(vcpu, context);
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context->new_cr3 = paging_new_cr3;
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context->new_cr3 = paging_new_cr3;
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context->page_fault = paging32_page_fault;
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context->page_fault = paging32_page_fault;
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@ -3289,7 +3289,6 @@ static int paging32_init_context(struct kvm_vcpu *vcpu,
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context->sync_page = paging32_sync_page;
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context->sync_page = paging32_sync_page;
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context->invlpg = paging32_invlpg;
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context->invlpg = paging32_invlpg;
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context->update_pte = paging32_update_pte;
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context->update_pte = paging32_update_pte;
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context->root_level = PT32_ROOT_LEVEL;
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context->shadow_root_level = PT32E_ROOT_LEVEL;
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context->shadow_root_level = PT32E_ROOT_LEVEL;
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context->root_hpa = INVALID_PAGE;
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context->root_hpa = INVALID_PAGE;
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context->direct_map = false;
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context->direct_map = false;
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@ -3327,19 +3326,19 @@ static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
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context->root_level = 0;
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context->root_level = 0;
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} else if (is_long_mode(vcpu)) {
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} else if (is_long_mode(vcpu)) {
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context->nx = is_nx(vcpu);
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context->nx = is_nx(vcpu);
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reset_rsvds_bits_mask(vcpu, context, PT64_ROOT_LEVEL);
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context->gva_to_gpa = paging64_gva_to_gpa;
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context->root_level = PT64_ROOT_LEVEL;
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context->root_level = PT64_ROOT_LEVEL;
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reset_rsvds_bits_mask(vcpu, context);
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context->gva_to_gpa = paging64_gva_to_gpa;
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} else if (is_pae(vcpu)) {
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} else if (is_pae(vcpu)) {
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context->nx = is_nx(vcpu);
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context->nx = is_nx(vcpu);
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reset_rsvds_bits_mask(vcpu, context, PT32E_ROOT_LEVEL);
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context->gva_to_gpa = paging64_gva_to_gpa;
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context->root_level = PT32E_ROOT_LEVEL;
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context->root_level = PT32E_ROOT_LEVEL;
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reset_rsvds_bits_mask(vcpu, context);
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context->gva_to_gpa = paging64_gva_to_gpa;
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} else {
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} else {
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context->nx = false;
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context->nx = false;
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reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
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context->gva_to_gpa = paging32_gva_to_gpa;
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context->root_level = PT32_ROOT_LEVEL;
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context->root_level = PT32_ROOT_LEVEL;
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reset_rsvds_bits_mask(vcpu, context);
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context->gva_to_gpa = paging32_gva_to_gpa;
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}
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}
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return 0;
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return 0;
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@ -3402,18 +3401,18 @@ static int init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
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g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
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g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
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} else if (is_long_mode(vcpu)) {
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} else if (is_long_mode(vcpu)) {
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g_context->nx = is_nx(vcpu);
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g_context->nx = is_nx(vcpu);
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reset_rsvds_bits_mask(vcpu, g_context, PT64_ROOT_LEVEL);
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g_context->root_level = PT64_ROOT_LEVEL;
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g_context->root_level = PT64_ROOT_LEVEL;
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reset_rsvds_bits_mask(vcpu, g_context);
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g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
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g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
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} else if (is_pae(vcpu)) {
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} else if (is_pae(vcpu)) {
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g_context->nx = is_nx(vcpu);
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g_context->nx = is_nx(vcpu);
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reset_rsvds_bits_mask(vcpu, g_context, PT32E_ROOT_LEVEL);
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g_context->root_level = PT32E_ROOT_LEVEL;
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g_context->root_level = PT32E_ROOT_LEVEL;
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reset_rsvds_bits_mask(vcpu, g_context);
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g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
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g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
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} else {
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} else {
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g_context->nx = false;
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g_context->nx = false;
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reset_rsvds_bits_mask(vcpu, g_context, PT32_ROOT_LEVEL);
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g_context->root_level = PT32_ROOT_LEVEL;
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g_context->root_level = PT32_ROOT_LEVEL;
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reset_rsvds_bits_mask(vcpu, g_context);
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g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
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g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
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}
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}
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