[ARM] mmp: move mmp2 specific timer code to mmp2.c
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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@ -17,6 +17,7 @@
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#include <asm/hardware/cache-tauros2.h>
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#include <asm/mach/time.h>
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#include <mach/addr-map.h>
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#include <mach/regs-apbc.h>
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#include <mach/regs-apmu.h>
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@ -158,6 +159,26 @@ static int __init mmp2_init(void)
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}
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postcore_initcall(mmp2_init);
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static void __init mmp2_timer_init(void)
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{
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unsigned long clk_rst;
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__raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS);
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/*
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* enable bus/functional clock, enable 6.5MHz (divider 4),
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* release reset
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*/
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clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
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__raw_writel(clk_rst, APBC_MMP2_TIMERS);
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timer_init(IRQ_MMP2_TIMER1);
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}
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struct sys_timer mmp2_timer = {
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.init = mmp2_timer_init,
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};
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/* on-chip devices */
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MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
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MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);
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@ -200,24 +200,3 @@ void __init timer_init(int irq)
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clocksource_register(&cksrc);
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clockevents_register_device(&ckevt);
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}
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static void __init mmp2_timer_init(void)
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{
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unsigned long clk_rst;
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__raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS);
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/*
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* enable bus/functional clock, enable 6.5MHz (divider 4),
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* release reset
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*/
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clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
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__raw_writel(clk_rst, APBC_MMP2_TIMERS);
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timer_init(IRQ_MMP2_TIMER1);
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}
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struct sys_timer mmp2_timer = {
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.init = mmp2_timer_init,
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};
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