dmaengine: jz4780: Fix an endian bug in IRQ handler
The "pending" variable was a u32 but we cast it to an unsigned long
pointer when we do the for_each_set_bit() loop. The problem is that on
big endian 64bit systems that results in an out of bounds read.
Fixes: 4e4106f5e9
("dmaengine: jz4780: Fix transfers being ACKed too soon")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -718,12 +718,13 @@ static irqreturn_t jz4780_dma_irq_handler(int irq, void *data)
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{
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struct jz4780_dma_dev *jzdma = data;
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unsigned int nb_channels = jzdma->soc_data->nb_channels;
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uint32_t pending, dmac;
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unsigned long pending;
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uint32_t dmac;
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int i;
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pending = jz4780_dma_ctrl_readl(jzdma, JZ_DMA_REG_DIRQP);
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for_each_set_bit(i, (unsigned long *)&pending, nb_channels) {
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for_each_set_bit(i, &pending, nb_channels) {
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if (jz4780_dma_chan_irq(jzdma, &jzdma->chan[i]))
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pending &= ~BIT(i);
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}
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