ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
1. Change clock-names to "sspclk", "apb_pclk". Both of them use the same clock. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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@ -127,8 +127,8 @@
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x12120000 0x1000>;
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg HI3519_SPI0_CLK>;
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clock-names = "apb_pclk";
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clocks = <&crg HI3519_SPI0_CLK>, <&crg HI3519_SPI0_CLK>;
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clock-names = "sspclk", "apb_pclk";
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -139,8 +139,8 @@
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x12121000 0x1000>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg HI3519_SPI1_CLK>;
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clock-names = "apb_pclk";
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clocks = <&crg HI3519_SPI1_CLK>, <&crg HI3519_SPI1_CLK>;
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clock-names = "sspclk", "apb_pclk";
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -151,8 +151,8 @@
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x12122000 0x1000>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg HI3519_SPI2_CLK>;
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clock-names = "apb_pclk";
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clocks = <&crg HI3519_SPI2_CLK>, <&crg HI3519_SPI2_CLK>;
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clock-names = "sspclk", "apb_pclk";
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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