[media] dvb-frontends/cxd2841er: support IF speed calc from tuner values
Add a AUTO_IFHZ flag and a function that will read IF speed values from any attached tuner if the tuner supports this and if AUTO_IFHZ is enabled, and else the passed default value (which probably matches Sony ASCOT tuners) will be passed back. The returned value is then used to calculate the iffeq which the demod will be programmed with. Signed-off-by: Daniel Scheller <d.scheller@gmx.net> Acked-by: Abylay Ospan <aospan@netup.ru> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
This commit is contained in:
Daniel Scheller
Mauro Carvalho Chehab
parent
c7518d13f7
commit
4b866c4e65
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@ -327,6 +327,20 @@ static u32 cxd2841er_calc_iffreq(u32 ifhz)
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return cxd2841er_calc_iffreq_xtal(SONY_XTAL_20500, ifhz);
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}
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static int cxd2841er_get_if_hz(struct cxd2841er_priv *priv, u32 def_hz)
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{
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u32 hz;
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if (priv->frontend.ops.tuner_ops.get_if_frequency
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&& (priv->flags & CXD2841ER_AUTO_IFHZ))
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priv->frontend.ops.tuner_ops.get_if_frequency(
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&priv->frontend, &hz);
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else
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hz = def_hz;
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return hz;
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}
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static int cxd2841er_tuner_set(struct dvb_frontend *fe)
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{
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struct cxd2841er_priv *priv = fe->demodulator_priv;
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@ -2147,7 +2161,7 @@ static int cxd2841er_dvbt2_set_plp_config(struct cxd2841er_priv *priv,
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static int cxd2841er_sleep_tc_to_active_t2_band(struct cxd2841er_priv *priv,
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u32 bandwidth)
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{
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u32 iffreq;
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u32 iffreq, ifhz;
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u8 data[MAX_WRITE_REGSIZE];
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const uint8_t nominalRate8bw[3][5] = {
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@ -2253,7 +2267,8 @@ static int cxd2841er_sleep_tc_to_active_t2_band(struct cxd2841er_priv *priv,
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cxd2841er_write_regs(priv, I2C_SLVT,
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0xA6, itbCoef8bw[priv->xtal], 14);
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/* <IF freq setting> */
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, 4800000);
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ifhz = cxd2841er_get_if_hz(priv, 4800000);
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, ifhz);
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data[0] = (u8) ((iffreq >> 16) & 0xff);
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data[1] = (u8)((iffreq >> 8) & 0xff);
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data[2] = (u8)(iffreq & 0xff);
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@ -2281,7 +2296,8 @@ static int cxd2841er_sleep_tc_to_active_t2_band(struct cxd2841er_priv *priv,
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cxd2841er_write_regs(priv, I2C_SLVT,
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0xA6, itbCoef7bw[priv->xtal], 14);
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/* <IF freq setting> */
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, 4200000);
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ifhz = cxd2841er_get_if_hz(priv, 4200000);
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, ifhz);
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data[0] = (u8) ((iffreq >> 16) & 0xff);
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data[1] = (u8)((iffreq >> 8) & 0xff);
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data[2] = (u8)(iffreq & 0xff);
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@ -2309,7 +2325,8 @@ static int cxd2841er_sleep_tc_to_active_t2_band(struct cxd2841er_priv *priv,
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cxd2841er_write_regs(priv, I2C_SLVT,
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0xA6, itbCoef6bw[priv->xtal], 14);
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/* <IF freq setting> */
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, 3600000);
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ifhz = cxd2841er_get_if_hz(priv, 3600000);
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, ifhz);
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data[0] = (u8) ((iffreq >> 16) & 0xff);
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data[1] = (u8)((iffreq >> 8) & 0xff);
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data[2] = (u8)(iffreq & 0xff);
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@ -2337,7 +2354,8 @@ static int cxd2841er_sleep_tc_to_active_t2_band(struct cxd2841er_priv *priv,
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cxd2841er_write_regs(priv, I2C_SLVT,
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0xA6, itbCoef5bw[priv->xtal], 14);
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/* <IF freq setting> */
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, 3600000);
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ifhz = cxd2841er_get_if_hz(priv, 3600000);
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, ifhz);
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data[0] = (u8) ((iffreq >> 16) & 0xff);
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data[1] = (u8)((iffreq >> 8) & 0xff);
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data[2] = (u8)(iffreq & 0xff);
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@ -2365,7 +2383,8 @@ static int cxd2841er_sleep_tc_to_active_t2_band(struct cxd2841er_priv *priv,
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cxd2841er_write_regs(priv, I2C_SLVT,
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0xA6, itbCoef17bw[priv->xtal], 14);
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/* <IF freq setting> */
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, 3500000);
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ifhz = cxd2841er_get_if_hz(priv, 3500000);
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, ifhz);
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data[0] = (u8) ((iffreq >> 16) & 0xff);
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data[1] = (u8)((iffreq >> 8) & 0xff);
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data[2] = (u8)(iffreq & 0xff);
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@ -2384,7 +2403,7 @@ static int cxd2841er_sleep_tc_to_active_t_band(
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struct cxd2841er_priv *priv, u32 bandwidth)
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{
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u8 data[MAX_WRITE_REGSIZE];
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u32 iffreq;
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u32 iffreq, ifhz;
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u8 nominalRate8bw[3][5] = {
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/* TRCG Nominal Rate [37:0] */
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{0x11, 0xF0, 0x00, 0x00, 0x00}, /* 20.5MHz XTal */
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@ -2464,7 +2483,8 @@ static int cxd2841er_sleep_tc_to_active_t_band(
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cxd2841er_write_regs(priv, I2C_SLVT,
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0xA6, itbCoef8bw[priv->xtal], 14);
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/* <IF freq setting> */
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, 4800000);
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ifhz = cxd2841er_get_if_hz(priv, 4800000);
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, ifhz);
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data[0] = (u8) ((iffreq >> 16) & 0xff);
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data[1] = (u8)((iffreq >> 8) & 0xff);
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data[2] = (u8)(iffreq & 0xff);
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@ -2499,7 +2519,8 @@ static int cxd2841er_sleep_tc_to_active_t_band(
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cxd2841er_write_regs(priv, I2C_SLVT,
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0xA6, itbCoef7bw[priv->xtal], 14);
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/* <IF freq setting> */
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, 4200000);
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ifhz = cxd2841er_get_if_hz(priv, 4200000);
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, ifhz);
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data[0] = (u8) ((iffreq >> 16) & 0xff);
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data[1] = (u8)((iffreq >> 8) & 0xff);
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data[2] = (u8)(iffreq & 0xff);
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@ -2534,7 +2555,8 @@ static int cxd2841er_sleep_tc_to_active_t_band(
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cxd2841er_write_regs(priv, I2C_SLVT,
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0xA6, itbCoef6bw[priv->xtal], 14);
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/* <IF freq setting> */
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, 3600000);
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ifhz = cxd2841er_get_if_hz(priv, 3600000);
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, ifhz);
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data[0] = (u8) ((iffreq >> 16) & 0xff);
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data[1] = (u8)((iffreq >> 8) & 0xff);
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data[2] = (u8)(iffreq & 0xff);
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@ -2569,7 +2591,8 @@ static int cxd2841er_sleep_tc_to_active_t_band(
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cxd2841er_write_regs(priv, I2C_SLVT,
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0xA6, itbCoef5bw[priv->xtal], 14);
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/* <IF freq setting> */
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, 3600000);
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ifhz = cxd2841er_get_if_hz(priv, 3600000);
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, ifhz);
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data[0] = (u8) ((iffreq >> 16) & 0xff);
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data[1] = (u8)((iffreq >> 8) & 0xff);
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data[2] = (u8)(iffreq & 0xff);
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@ -2602,7 +2625,7 @@ static int cxd2841er_sleep_tc_to_active_t_band(
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static int cxd2841er_sleep_tc_to_active_i_band(
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struct cxd2841er_priv *priv, u32 bandwidth)
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{
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u32 iffreq;
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u32 iffreq, ifhz;
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u8 data[3];
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/* TRCG Nominal Rate */
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@ -2671,7 +2694,8 @@ static int cxd2841er_sleep_tc_to_active_i_band(
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0xA6, itbCoef8bw[priv->xtal], 14);
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/* IF freq setting */
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, 4750000);
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ifhz = cxd2841er_get_if_hz(priv, 4750000);
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, ifhz);
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data[0] = (u8) ((iffreq >> 16) & 0xff);
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data[1] = (u8)((iffreq >> 8) & 0xff);
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data[2] = (u8)(iffreq & 0xff);
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@ -2700,7 +2724,8 @@ static int cxd2841er_sleep_tc_to_active_i_band(
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0xA6, itbCoef7bw[priv->xtal], 14);
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/* IF freq setting */
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, 4150000);
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ifhz = cxd2841er_get_if_hz(priv, 4150000);
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, ifhz);
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data[0] = (u8) ((iffreq >> 16) & 0xff);
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data[1] = (u8)((iffreq >> 8) & 0xff);
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data[2] = (u8)(iffreq & 0xff);
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@ -2729,7 +2754,8 @@ static int cxd2841er_sleep_tc_to_active_i_band(
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0xA6, itbCoef6bw[priv->xtal], 14);
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/* IF freq setting */
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, 3550000);
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ifhz = cxd2841er_get_if_hz(priv, 3550000);
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iffreq = cxd2841er_calc_iffreq_xtal(priv->xtal, ifhz);
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data[0] = (u8) ((iffreq >> 16) & 0xff);
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data[1] = (u8)((iffreq >> 8) & 0xff);
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data[2] = (u8)(iffreq & 0xff);
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@ -2772,7 +2798,7 @@ static int cxd2841er_sleep_tc_to_active_c_band(struct cxd2841er_priv *priv,
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0x27, 0xA7, 0x28, 0xB3, 0x02, 0xF0, 0x01, 0xE8,
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0x00, 0xCF, 0x00, 0xE6, 0x23, 0xA4 };
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u8 b10_b6[3];
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u32 iffreq;
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u32 iffreq, ifhz;
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if (bandwidth != 6000000 &&
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bandwidth != 7000000 &&
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@ -2790,13 +2816,15 @@ static int cxd2841er_sleep_tc_to_active_c_band(struct cxd2841er_priv *priv,
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cxd2841er_write_regs(
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priv, I2C_SLVT, 0xa6,
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bw7_8mhz_b10_a6, sizeof(bw7_8mhz_b10_a6));
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iffreq = cxd2841er_calc_iffreq(4900000);
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ifhz = cxd2841er_get_if_hz(priv, 4900000);
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iffreq = cxd2841er_calc_iffreq(ifhz);
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break;
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case 6000000:
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cxd2841er_write_regs(
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priv, I2C_SLVT, 0xa6,
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bw6mhz_b10_a6, sizeof(bw6mhz_b10_a6));
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iffreq = cxd2841er_calc_iffreq(3700000);
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ifhz = cxd2841er_get_if_hz(priv, 3700000);
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iffreq = cxd2841er_calc_iffreq(ifhz);
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break;
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default:
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dev_err(&priv->i2c->dev, "%s(): unsupported bandwidth %d\n",
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@ -25,6 +25,7 @@
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#include <linux/dvb/frontend.h>
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#define CXD2841ER_USE_GATECTRL 1
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#define CXD2841ER_AUTO_IFHZ 2
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enum cxd2841er_xtal {
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SONY_XTAL_20500, /* 20.5 MHz */
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