sh-pfc: Use sh_pfc_ namespace prefix through the whole driver
Most of the function and structure names are prefixed by sh_pfc_. Fix the ones that are not to avoid namespace clashes (especially for functions that start with gpio_). Not included in this patch are the platform data structures, those will be reworked later. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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90efde223d
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4aeacd5bd5
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@ -26,7 +26,7 @@
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#include "core.h"
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static int pfc_ioremap(struct sh_pfc *pfc)
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static int sh_pfc_ioremap(struct sh_pfc *pfc)
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{
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struct resource *res;
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int k;
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@ -53,10 +53,10 @@ static int pfc_ioremap(struct sh_pfc *pfc)
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return 0;
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}
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static void __iomem *pfc_phys_to_virt(struct sh_pfc *pfc,
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unsigned long address)
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static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
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unsigned long address)
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{
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struct pfc_window *window;
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struct sh_pfc_window *window;
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int k;
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/* scan through physical windows and convert address */
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@ -76,7 +76,7 @@ static void __iomem *pfc_phys_to_virt(struct sh_pfc *pfc,
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return (void __iomem *)address;
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}
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static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
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static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
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{
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if (enum_id < r->begin)
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return 0;
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@ -87,8 +87,8 @@ static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
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return 1;
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}
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static unsigned long gpio_read_raw_reg(void __iomem *mapped_reg,
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unsigned long reg_width)
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static unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
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unsigned long reg_width)
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{
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switch (reg_width) {
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case 8:
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@ -103,9 +103,8 @@ static unsigned long gpio_read_raw_reg(void __iomem *mapped_reg,
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return 0;
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}
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static void gpio_write_raw_reg(void __iomem *mapped_reg,
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unsigned long reg_width,
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unsigned long data)
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static void sh_pfc_write_raw_reg(void __iomem *mapped_reg,
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unsigned long reg_width, unsigned long data)
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{
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switch (reg_width) {
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case 8:
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@ -131,7 +130,7 @@ int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos)
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pr_debug("read_bit: addr = %lx, pos = %ld, "
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"r_width = %ld\n", dr->reg, pos, dr->reg_width);
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return (gpio_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1;
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return (sh_pfc_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1;
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}
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void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
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@ -150,19 +149,19 @@ void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
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else
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clear_bit(pos, &dr->reg_shadow);
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gpio_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow);
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sh_pfc_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow);
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}
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static void config_reg_helper(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long in_pos,
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void __iomem **mapped_regp,
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unsigned long *maskp,
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unsigned long *posp)
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static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long in_pos,
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void __iomem **mapped_regp,
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unsigned long *maskp,
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unsigned long *posp)
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{
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int k;
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*mapped_regp = pfc_phys_to_virt(pfc, crp->reg);
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*mapped_regp = sh_pfc_phys_to_virt(pfc, crp->reg);
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if (crp->field_width) {
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*maskp = (1 << crp->field_width) - 1;
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@ -175,30 +174,30 @@ static void config_reg_helper(struct sh_pfc *pfc,
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}
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}
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static int read_config_reg(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long field)
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static int sh_pfc_read_config_reg(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long field)
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{
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void __iomem *mapped_reg;
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unsigned long mask, pos;
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config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
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sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
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pr_debug("read_reg: addr = %lx, field = %ld, "
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"r_width = %ld, f_width = %ld\n",
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crp->reg, field, crp->reg_width, crp->field_width);
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return (gpio_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask;
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return (sh_pfc_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask;
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}
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static void write_config_reg(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long field, unsigned long value)
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static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long field, unsigned long value)
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{
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void __iomem *mapped_reg;
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unsigned long mask, pos, data;
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config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
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sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
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pr_debug("write_reg addr = %lx, value = %ld, field = %ld, "
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"r_width = %ld, f_width = %ld\n",
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@ -207,24 +206,25 @@ static void write_config_reg(struct sh_pfc *pfc,
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mask = ~(mask << pos);
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value = value << pos;
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data = gpio_read_raw_reg(mapped_reg, crp->reg_width);
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data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width);
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data &= mask;
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data |= value;
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if (pfc->pdata->unlock_reg)
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gpio_write_raw_reg(pfc_phys_to_virt(pfc, pfc->pdata->unlock_reg),
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32, ~data);
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sh_pfc_write_raw_reg(
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sh_pfc_phys_to_virt(pfc, pfc->pdata->unlock_reg), 32,
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~data);
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gpio_write_raw_reg(mapped_reg, crp->reg_width, data);
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sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data);
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}
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static int setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
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static int sh_pfc_setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
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{
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struct pinmux_gpio *gpiop = &pfc->pdata->gpios[gpio];
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struct pinmux_data_reg *data_reg;
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int k, n;
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if (!enum_in_range(gpiop->enum_id, &pfc->pdata->data))
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if (!sh_pfc_enum_in_range(gpiop->enum_id, &pfc->pdata->data))
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return -1;
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k = 0;
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@ -234,7 +234,7 @@ static int setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
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if (!data_reg->reg_width)
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break;
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data_reg->mapped_reg = pfc_phys_to_virt(pfc, data_reg->reg);
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data_reg->mapped_reg = sh_pfc_phys_to_virt(pfc, data_reg->reg);
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for (n = 0; n < data_reg->reg_width; n++) {
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if (data_reg->enum_ids[n] == gpiop->enum_id) {
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@ -253,13 +253,13 @@ static int setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
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return -1;
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}
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static void setup_data_regs(struct sh_pfc *pfc)
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static void sh_pfc_setup_data_regs(struct sh_pfc *pfc)
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{
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struct pinmux_data_reg *drp;
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int k;
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for (k = pfc->pdata->first_gpio; k <= pfc->pdata->last_gpio; k++)
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setup_data_reg(pfc, k);
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sh_pfc_setup_data_reg(pfc, k);
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k = 0;
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while (1) {
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@ -268,8 +268,8 @@ static void setup_data_regs(struct sh_pfc *pfc)
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if (!drp->reg_width)
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break;
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drp->reg_shadow = gpio_read_raw_reg(drp->mapped_reg,
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drp->reg_width);
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drp->reg_shadow = sh_pfc_read_raw_reg(drp->mapped_reg,
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drp->reg_width);
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k++;
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}
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}
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@ -280,7 +280,7 @@ int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
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struct pinmux_gpio *gpiop = &pfc->pdata->gpios[gpio];
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int k, n;
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if (!enum_in_range(gpiop->enum_id, &pfc->pdata->data))
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if (!sh_pfc_enum_in_range(gpiop->enum_id, &pfc->pdata->data))
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return -1;
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k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
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@ -290,10 +290,9 @@ int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
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return 0;
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}
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static int get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
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struct pinmux_cfg_reg **crp,
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int *fieldp, int *valuep,
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unsigned long **cntp)
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static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
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struct pinmux_cfg_reg **crp, int *fieldp,
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int *valuep, unsigned long **cntp)
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{
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struct pinmux_cfg_reg *config_reg;
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unsigned long r_width, f_width, curr_width, ncomb;
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pinmux_enum_t *data = pfc->pdata->gpio_data;
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int k;
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if (!enum_in_range(enum_id, &pfc->pdata->data)) {
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if (!enum_in_range(enum_id, &pfc->pdata->mark)) {
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if (!sh_pfc_enum_in_range(enum_id, &pfc->pdata->data)) {
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if (!sh_pfc_enum_in_range(enum_id, &pfc->pdata->mark)) {
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pr_err("non data/mark enum_id for gpio %d\n", gpio);
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return -1;
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}
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@ -414,7 +413,7 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
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break;
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/* first check if this is a function enum */
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in_range = enum_in_range(enum_id, &pfc->pdata->function);
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in_range = sh_pfc_enum_in_range(enum_id, &pfc->pdata->function);
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if (!in_range) {
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/* not a function enum */
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if (range) {
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* for this case we only allow function enums
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* and the enums that match the other range.
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*/
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in_range = enum_in_range(enum_id, range);
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in_range = sh_pfc_enum_in_range(enum_id, range);
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/*
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* special case pass through for fixed
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@ -451,19 +450,19 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
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if (!in_range)
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continue;
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if (get_config_reg(pfc, enum_id, &cr,
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&field, &value, &cntp) != 0)
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if (sh_pfc_get_config_reg(pfc, enum_id, &cr,
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&field, &value, &cntp) != 0)
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goto out_err;
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switch (cfg_mode) {
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case GPIO_CFG_DRYRUN:
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if (!*cntp ||
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(read_config_reg(pfc, cr, field) != value))
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(sh_pfc_read_config_reg(pfc, cr, field) != value))
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continue;
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break;
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case GPIO_CFG_REQ:
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write_config_reg(pfc, cr, field, value);
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sh_pfc_write_config_reg(pfc, cr, field, value);
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*cntp = *cntp + 1;
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break;
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@ -499,14 +498,14 @@ static int sh_pfc_probe(struct platform_device *pdev)
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pfc->pdata = pdata;
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pfc->dev = &pdev->dev;
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ret = pfc_ioremap(pfc);
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ret = sh_pfc_ioremap(pfc);
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if (unlikely(ret < 0))
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return ret;
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spin_lock_init(&pfc->lock);
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pinctrl_provide_dummies();
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setup_data_regs(pfc);
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sh_pfc_setup_data_regs(pfc);
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/*
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* Initialize pinctrl bindings first
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@ -14,7 +14,7 @@
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#include <linux/sh_pfc.h>
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#include <linux/types.h>
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struct pfc_window {
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struct sh_pfc_window {
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phys_addr_t phys;
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void __iomem *virt;
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unsigned long size;
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struct sh_pfc_platform_data *pdata;
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spinlock_t lock;
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struct pfc_window *window;
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struct sh_pfc_window *window;
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struct sh_pfc_chip *gpio;
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struct sh_pfc_pinctrl *pinctrl;
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};
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