[PATCH] ARM: 2677/1: S3C2440 - UPLL frequency doubled
Patch from Ben Dooks S3C2440 UPLL is the same as the S3C2410 UPLL, it is only the MPLL which has an extra multiplication factor of 2 in the multiplier. Signed-off-by: Ben Dooks Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -478,7 +478,7 @@ static int s3c2440_clk_add(struct sys_device *sysdev)
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{
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unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
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s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal.rate) * 2;
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s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal.rate);
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printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",
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print_mhz(s3c2440_clk_upll.rate));
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