nds32: consolidate DMA cache maintainance routines
Make sure all other DMA methods call nds32_dma_sync_single_for_{device,cpu}
to perform cache maintaince, and remove the consisteny_sync helper that
implemented both with entirely separate code based off an argument.
Also make sure these helpers handled highmem properly, for which code
is copy and pasted from mips.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Greentime Hu <greentime@andestech.com>
Tested-by: Greentime Hu <greentime@andestech.com>
This commit is contained in:
Christoph Hellwig
parent
0ead51c3fb
commit
4ac1c68e36
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@ -22,11 +22,6 @@
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static pte_t *consistent_pte;
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static DEFINE_RAW_SPINLOCK(consistent_lock);
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enum master_type {
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FOR_CPU = 0,
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FOR_DEVICE = 1,
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};
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/*
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* VM region handling support.
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*
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@ -333,15 +328,85 @@ static int __init consistent_init(void)
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}
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core_initcall(consistent_init);
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static void consistent_sync(void *vaddr, size_t size, int direction, int master_type);
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static inline void cache_op(phys_addr_t paddr, size_t size,
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void (*fn)(unsigned long start, unsigned long end))
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{
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struct page *page = pfn_to_page(paddr >> PAGE_SHIFT);
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unsigned offset = paddr & ~PAGE_MASK;
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size_t left = size;
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unsigned long start;
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do {
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size_t len = left;
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if (PageHighMem(page)) {
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void *addr;
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if (offset + len > PAGE_SIZE) {
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if (offset >= PAGE_SIZE) {
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page += offset >> PAGE_SHIFT;
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offset &= ~PAGE_MASK;
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}
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len = PAGE_SIZE - offset;
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}
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addr = kmap_atomic(page);
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start = (unsigned long)(addr + offset);
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fn(start, start + len);
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kunmap_atomic(addr);
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} else {
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start = (unsigned long)phys_to_virt(paddr);
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fn(start, start + size);
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}
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offset = 0;
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page++;
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left -= len;
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} while (left);
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}
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static void
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nds32_dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_FROM_DEVICE:
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break;
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case DMA_TO_DEVICE:
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case DMA_BIDIRECTIONAL:
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cache_op(handle, size, cpu_dma_wb_range);
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break;
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default:
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BUG();
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}
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}
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static void
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nds32_dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_TO_DEVICE:
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break;
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case DMA_FROM_DEVICE:
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case DMA_BIDIRECTIONAL:
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cache_op(handle, size, cpu_dma_inval_range);
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break;
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default:
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BUG();
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}
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}
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static dma_addr_t nds32_dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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dma_addr_t dma_addr = page_to_phys(page) + offset;
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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consistent_sync((void *)(page_address(page) + offset), size, dir, FOR_DEVICE);
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return page_to_phys(page) + offset;
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nds32_dma_sync_single_for_device(dev, handle, size, dir);
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return dma_addr;
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}
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static void nds32_dma_unmap_page(struct device *dev, dma_addr_t handle,
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@ -349,40 +414,30 @@ static void nds32_dma_unmap_page(struct device *dev, dma_addr_t handle,
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unsigned long attrs)
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{
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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consistent_sync(phys_to_virt(handle), size, dir, FOR_CPU);
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nds32_dma_sync_single_for_cpu(dev, handle, size, dir);
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}
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/*
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* Make an area consistent for devices.
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*/
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static void consistent_sync(void *vaddr, size_t size, int direction, int master_type)
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static void
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nds32_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir)
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{
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unsigned long start = (unsigned long)vaddr;
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unsigned long end = start + size;
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int i;
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if (master_type == FOR_CPU) {
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switch (direction) {
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case DMA_TO_DEVICE:
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break;
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case DMA_FROM_DEVICE:
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case DMA_BIDIRECTIONAL:
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cpu_dma_inval_range(start, end);
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break;
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default:
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BUG();
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}
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} else {
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/* FOR_DEVICE */
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switch (direction) {
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case DMA_FROM_DEVICE:
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break;
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case DMA_TO_DEVICE:
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case DMA_BIDIRECTIONAL:
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cpu_dma_wb_range(start, end);
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break;
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default:
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BUG();
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}
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for (i = 0; i < nents; i++, sg++) {
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nds32_dma_sync_single_for_device(dev, sg_dma_address(sg),
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sg->length, dir);
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}
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}
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static void
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nds32_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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{
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int i;
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for (i = 0; i < nents; i++, sg++) {
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nds32_dma_sync_single_for_cpu(dev, sg_dma_address(sg),
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sg->length, dir);
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}
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}
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@ -393,24 +448,8 @@ static int nds32_dma_map_sg(struct device *dev, struct scatterlist *sg,
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int i;
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for (i = 0; i < nents; i++, sg++) {
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void *virt;
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unsigned long pfn;
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struct page *page = sg_page(sg);
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sg->dma_address = sg_phys(sg);
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pfn = page_to_pfn(page) + sg->offset / PAGE_SIZE;
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page = pfn_to_page(pfn);
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if (PageHighMem(page)) {
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virt = kmap_atomic(page);
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consistent_sync(virt, sg->length, dir, FOR_CPU);
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kunmap_atomic(virt);
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} else {
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if (sg->offset > PAGE_SIZE)
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panic("sg->offset:%08x > PAGE_SIZE\n",
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sg->offset);
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virt = page_address(page) + sg->offset;
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consistent_sync(virt, sg->length, dir, FOR_CPU);
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}
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nds32_dma_sync_single_for_device(dev, sg_dma_address(sg),
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sg->length, dir);
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}
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return nents;
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}
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@ -421,46 +460,6 @@ static void nds32_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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{
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}
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static void
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nds32_dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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consistent_sync((void *)phys_to_virt(handle), size, dir, FOR_CPU);
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}
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static void
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nds32_dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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consistent_sync((void *)phys_to_virt(handle), size, dir, FOR_DEVICE);
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}
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static void
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nds32_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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{
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int i;
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for (i = 0; i < nents; i++, sg++) {
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char *virt =
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page_address((struct page *)sg->page_link) + sg->offset;
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consistent_sync(virt, sg->length, dir, FOR_CPU);
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}
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}
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static void
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nds32_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir)
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{
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int i;
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for (i = 0; i < nents; i++, sg++) {
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char *virt =
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page_address((struct page *)sg->page_link) + sg->offset;
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consistent_sync(virt, sg->length, dir, FOR_DEVICE);
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}
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}
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struct dma_map_ops nds32_dma_ops = {
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.alloc = nds32_dma_alloc_coherent,
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.free = nds32_dma_free,
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