ALSA: intel8x0: Use the new non-cached allocation for 440MX workaround
intel8x0 driver requires the non-cached pages for 440MX workaround, and this can be implemented more easily with the new memalloc type, SNDRV_DMA_TYPE_DEV_UC. This allows us to reduce lots of code. Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Takashi Iwai
parent
193c7e1476
commit
4985ddbf1e
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@ -38,11 +38,6 @@
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#include <sound/ac97_codec.h>
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#include <sound/info.h>
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#include <sound/initval.h>
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/* for 440MX workaround */
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#include <asm/pgtable.h>
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#ifdef CONFIG_X86
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#include <asm/set_memory.h>
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#endif
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MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
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MODULE_DESCRIPTION("Intel 82801AA,82901AB,i810,i820,i830,i840,i845,MX440; SiS 7012; Ali 5455");
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@ -374,7 +369,6 @@ struct ichdev {
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unsigned int ali_slot; /* ALI DMA slot */
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struct ac97_pcm *pcm;
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int pcm_open_flag;
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unsigned int page_attr_changed: 1;
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unsigned int suspended: 1;
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};
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@ -724,25 +718,6 @@ static void snd_intel8x0_setup_periods(struct intel8x0 *chip, struct ichdev *ich
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iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);
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}
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#ifdef __i386__
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/*
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* Intel 82443MX running a 100MHz processor system bus has a hardware bug,
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* which aborts PCI busmaster for audio transfer. A workaround is to set
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* the pages as non-cached. For details, see the errata in
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* http://download.intel.com/design/chipsets/specupdt/24505108.pdf
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*/
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static void fill_nocache(void *buf, int size, int nocache)
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{
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size = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
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if (nocache)
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set_pages_uc(virt_to_page(buf), size);
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else
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set_pages_wb(virt_to_page(buf), size);
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}
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#else
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#define fill_nocache(buf, size, nocache) do { ; } while (0)
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#endif
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/*
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* Interrupt handler
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*/
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@ -938,23 +913,12 @@ static int snd_intel8x0_hw_params(struct snd_pcm_substream *substream,
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{
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struct intel8x0 *chip = snd_pcm_substream_chip(substream);
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struct ichdev *ichdev = get_ichdev(substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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int dbl = params_rate(hw_params) > 48000;
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int err;
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if (chip->fix_nocache && ichdev->page_attr_changed) {
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fill_nocache(runtime->dma_area, runtime->dma_bytes, 0); /* clear */
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ichdev->page_attr_changed = 0;
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}
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err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
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if (err < 0)
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return err;
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if (chip->fix_nocache) {
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if (runtime->dma_area && ! ichdev->page_attr_changed) {
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fill_nocache(runtime->dma_area, runtime->dma_bytes, 1);
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ichdev->page_attr_changed = 1;
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}
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}
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if (ichdev->pcm_open_flag) {
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snd_ac97_pcm_close(ichdev->pcm);
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ichdev->pcm_open_flag = 0;
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@ -974,17 +938,12 @@ static int snd_intel8x0_hw_params(struct snd_pcm_substream *substream,
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static int snd_intel8x0_hw_free(struct snd_pcm_substream *substream)
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{
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struct intel8x0 *chip = snd_pcm_substream_chip(substream);
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struct ichdev *ichdev = get_ichdev(substream);
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if (ichdev->pcm_open_flag) {
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snd_ac97_pcm_close(ichdev->pcm);
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ichdev->pcm_open_flag = 0;
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}
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if (chip->fix_nocache && ichdev->page_attr_changed) {
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fill_nocache(substream->runtime->dma_area, substream->runtime->dma_bytes, 0);
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ichdev->page_attr_changed = 0;
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}
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return snd_pcm_lib_free_pages(substream);
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}
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@ -1510,6 +1469,9 @@ struct ich_pcm_table {
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int ac97_idx;
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};
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#define intel8x0_dma_type(chip) \
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((chip)->fix_nocache ? SNDRV_DMA_TYPE_DEV_UC : SNDRV_DMA_TYPE_DEV)
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static int snd_intel8x0_pcm1(struct intel8x0 *chip, int device,
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struct ich_pcm_table *rec)
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{
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@ -1540,7 +1502,7 @@ static int snd_intel8x0_pcm1(struct intel8x0 *chip, int device,
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strcpy(pcm->name, chip->card->shortname);
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chip->pcm[device] = pcm;
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snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
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snd_pcm_lib_preallocate_pages_for_all(pcm, intel8x0_dma_type(chip),
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snd_dma_pci_data(chip->pci),
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rec->prealloc_size, rec->prealloc_max_size);
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@ -2629,11 +2591,8 @@ static int snd_intel8x0_free(struct intel8x0 *chip)
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__hw_end:
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if (chip->irq >= 0)
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free_irq(chip->irq, chip);
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if (chip->bdbars.area) {
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if (chip->fix_nocache)
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fill_nocache(chip->bdbars.area, chip->bdbars.bytes, 0);
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if (chip->bdbars.area)
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snd_dma_free_pages(&chip->bdbars);
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}
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if (chip->addr)
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pci_iounmap(chip->pci, chip->addr);
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if (chip->bmaddr)
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@ -2657,17 +2616,6 @@ static int intel8x0_suspend(struct device *dev)
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snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
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for (i = 0; i < chip->pcm_devs; i++)
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snd_pcm_suspend_all(chip->pcm[i]);
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/* clear nocache */
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if (chip->fix_nocache) {
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for (i = 0; i < chip->bdbars_count; i++) {
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struct ichdev *ichdev = &chip->ichd[i];
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if (ichdev->substream && ichdev->page_attr_changed) {
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struct snd_pcm_runtime *runtime = ichdev->substream->runtime;
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if (runtime->dma_area)
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fill_nocache(runtime->dma_area, runtime->dma_bytes, 0);
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}
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}
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}
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for (i = 0; i < chip->ncodecs; i++)
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snd_ac97_suspend(chip->ac97[i]);
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if (chip->device_type == DEVICE_INTEL_ICH4)
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@ -2708,25 +2656,9 @@ static int intel8x0_resume(struct device *dev)
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ICH_PCM_SPDIF_1011);
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}
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/* refill nocache */
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if (chip->fix_nocache)
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fill_nocache(chip->bdbars.area, chip->bdbars.bytes, 1);
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for (i = 0; i < chip->ncodecs; i++)
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snd_ac97_resume(chip->ac97[i]);
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/* refill nocache */
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if (chip->fix_nocache) {
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for (i = 0; i < chip->bdbars_count; i++) {
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struct ichdev *ichdev = &chip->ichd[i];
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if (ichdev->substream && ichdev->page_attr_changed) {
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struct snd_pcm_runtime *runtime = ichdev->substream->runtime;
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if (runtime->dma_area)
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fill_nocache(runtime->dma_area, runtime->dma_bytes, 1);
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}
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}
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}
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/* resume status */
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for (i = 0; i < chip->bdbars_count; i++) {
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struct ichdev *ichdev = &chip->ichd[i];
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@ -3057,6 +2989,12 @@ static int snd_intel8x0_create(struct snd_card *card,
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chip->inside_vm = snd_intel8x0_inside_vm(pci);
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/*
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* Intel 82443MX running a 100MHz processor system bus has a hardware
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* bug, which aborts PCI busmaster for audio transfer. A workaround
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* is to set the pages as non-cached. For details, see the errata in
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* http://download.intel.com/design/chipsets/specupdt/24505108.pdf
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*/
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if (pci->vendor == PCI_VENDOR_ID_INTEL &&
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pci->device == PCI_DEVICE_ID_INTEL_440MX)
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chip->fix_nocache = 1; /* enable workaround */
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@ -3128,7 +3066,7 @@ static int snd_intel8x0_create(struct snd_card *card,
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/* allocate buffer descriptor lists */
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/* the start of each lists must be aligned to 8 bytes */
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if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
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if (snd_dma_alloc_pages(intel8x0_dma_type(chip), snd_dma_pci_data(pci),
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chip->bdbars_count * sizeof(u32) * ICH_MAX_FRAGS * 2,
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&chip->bdbars) < 0) {
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snd_intel8x0_free(chip);
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@ -3137,9 +3075,6 @@ static int snd_intel8x0_create(struct snd_card *card,
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}
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/* tables must be aligned to 8 bytes here, but the kernel pages
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are much bigger, so we don't care (on i386) */
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/* workaround for 440MX */
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if (chip->fix_nocache)
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fill_nocache(chip->bdbars.area, chip->bdbars.bytes, 1);
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int_sta_masks = 0;
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for (i = 0; i < chip->bdbars_count; i++) {
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ichdev = &chip->ichd[i];
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