drm/amd/display: Remove PSR functions in Linux
NULL check issue found by smatch: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link.c:1976 dc_link_setup_psr() warn: variable dereferenced before check 'link' (see line 1970) We don't use these functions so might as well remove them. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Harry Wentland
Alex Deucher
parent
feb4a3cd8e
commit
492c378aaa
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@ -1952,144 +1952,6 @@ bool dc_link_set_psr_enable(const struct dc_link *link, bool enable, bool wait)
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return true;
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return true;
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}
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}
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bool dc_link_get_psr_state(const struct dc_link *link, uint32_t *psr_state)
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{
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struct dc *core_dc = link->ctx->dc;
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struct dmcu *dmcu = core_dc->res_pool->dmcu;
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if (dmcu != NULL && link->psr_enabled)
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dmcu->funcs->get_psr_state(dmcu, psr_state);
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return true;
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}
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bool dc_link_setup_psr(struct dc_link *link,
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const struct dc_stream_state *stream, struct psr_config *psr_config,
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struct psr_context *psr_context)
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{
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struct dc *core_dc = link->ctx->dc;
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struct dmcu *dmcu = core_dc->res_pool->dmcu;
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int i;
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psr_context->controllerId = CONTROLLER_ID_UNDEFINED;
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if (link != NULL &&
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dmcu != NULL) {
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/* updateSinkPsrDpcdConfig*/
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union dpcd_psr_configuration psr_configuration;
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memset(&psr_configuration, 0, sizeof(psr_configuration));
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psr_configuration.bits.ENABLE = 1;
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psr_configuration.bits.CRC_VERIFICATION = 1;
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psr_configuration.bits.FRAME_CAPTURE_INDICATION =
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psr_config->psr_frame_capture_indication_req;
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/* Check for PSR v2*/
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if (psr_config->psr_version == 0x2) {
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/* For PSR v2 selective update.
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* Indicates whether sink should start capturing
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* immediately following active scan line,
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* or starting with the 2nd active scan line.
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*/
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psr_configuration.bits.LINE_CAPTURE_INDICATION = 0;
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/*For PSR v2, determines whether Sink should generate
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* IRQ_HPD when CRC mismatch is detected.
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*/
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psr_configuration.bits.IRQ_HPD_WITH_CRC_ERROR = 1;
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}
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dm_helpers_dp_write_dpcd(
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link->ctx,
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link,
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368,
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&psr_configuration.raw,
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sizeof(psr_configuration.raw));
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psr_context->channel = link->ddc->ddc_pin->hw_info.ddc_channel;
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psr_context->transmitterId = link->link_enc->transmitter;
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psr_context->engineId = link->link_enc->preferred_engine;
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for (i = 0; i < MAX_PIPES; i++) {
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if (core_dc->current_state->res_ctx.pipe_ctx[i].stream
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== stream) {
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/* dmcu -1 for all controller id values,
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* therefore +1 here
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*/
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psr_context->controllerId =
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core_dc->current_state->res_ctx.
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pipe_ctx[i].stream_res.tg->inst + 1;
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break;
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}
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}
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/* Hardcoded for now. Can be Pcie or Uniphy (or Unknown)*/
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psr_context->phyType = PHY_TYPE_UNIPHY;
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/*PhyId is associated with the transmitter id*/
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psr_context->smuPhyId = link->link_enc->transmitter;
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psr_context->crtcTimingVerticalTotal = stream->timing.v_total;
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psr_context->vsyncRateHz = div64_u64(div64_u64((stream->
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timing.pix_clk_khz * 1000),
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stream->timing.v_total),
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stream->timing.h_total);
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psr_context->psrSupportedDisplayConfig = true;
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psr_context->psrExitLinkTrainingRequired =
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psr_config->psr_exit_link_training_required;
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psr_context->sdpTransmitLineNumDeadline =
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psr_config->psr_sdp_transmit_line_num_deadline;
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psr_context->psrFrameCaptureIndicationReq =
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psr_config->psr_frame_capture_indication_req;
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psr_context->skipPsrWaitForPllLock = 0; /* only = 1 in KV */
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psr_context->numberOfControllers =
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link->dc->res_pool->res_cap->num_timing_generator;
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psr_context->rfb_update_auto_en = true;
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/* 2 frames before enter PSR. */
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psr_context->timehyst_frames = 2;
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/* half a frame
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* (units in 100 lines, i.e. a value of 1 represents 100 lines)
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*/
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psr_context->hyst_lines = stream->timing.v_total / 2 / 100;
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psr_context->aux_repeats = 10;
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psr_context->psr_level.u32all = 0;
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#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
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/*skip power down the single pipe since it blocks the cstate*/
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if (ASIC_REV_IS_RAVEN(link->ctx->asic_id.hw_internal_rev))
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psr_context->psr_level.bits.SKIP_CRTC_DISABLE = true;
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#endif
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/* SMU will perform additional powerdown sequence.
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* For unsupported ASICs, set psr_level flag to skip PSR
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* static screen notification to SMU.
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* (Always set for DAL2, did not check ASIC)
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*/
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psr_context->psr_level.bits.SKIP_SMU_NOTIFICATION = 1;
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/* Complete PSR entry before aborting to prevent intermittent
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* freezes on certain eDPs
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*/
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psr_context->psr_level.bits.DISABLE_PSR_ENTRY_ABORT = 1;
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/* Controls additional delay after remote frame capture before
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* continuing power down, default = 0
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*/
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psr_context->frame_delay = 0;
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link->psr_enabled = true;
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dmcu->funcs->setup_psr(dmcu, link, psr_context);
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return true;
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} else
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return false;
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}
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const struct dc_link_status *dc_link_get_status(const struct dc_link *link)
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const struct dc_link_status *dc_link_get_status(const struct dc_link *link)
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{
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{
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return &link->link_status;
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return &link->link_status;
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