[PATCH] ppc64: remove another fixed address constraint
Presently the LparMap, one of the structures the kernel shares with the legacy iSeries hypervisor has a fixed offset address in head.S. This patch changes this so the LparMap is a normally initialized structure, without fixed address. This allows us to use macros to compute some of the values in the structure, which wasn't previously possible because the assembler always uses signed-% which gets the wrong answers for the computations in question. Unfortunately, a gcc bug means that doing this requires another structure (hvReleaseData) to be initialized in asm instead of C, but on the whole the result is cleaner than before. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
David Gibson
Linus Torvalds
parent
533f08172e
commit
488f84994c
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@ -33,17 +33,36 @@
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* the hypervisor and Linux.
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*/
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/*
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* WARNING - magic here
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*
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* Ok, this is a horrid hack below, but marginally better than the
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* alternatives. What we really want is just to initialize
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* hvReleaseData in C as in the #if 0 section here. However, gcc
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* refuses to believe that (u32)&x is a constant expression, so will
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* not allow the xMsNucDataOffset field to be properly initialized.
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* So, we declare hvReleaseData in inline asm instead. We use inline
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* asm, rather than a .S file, because the assembler won't generate
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* the necessary relocation for the LparMap either, unless that symbol
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* is declared in the same source file. Finally, we put the asm in a
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* dummy, attribute-used function, instead of at file scope, because
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* file scope asms don't allow contraints. We want to use the "i"
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* constraints to put sizeof() and offsetof() expressions in there,
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* because including asm/offsets.h in C code then stringifying causes
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* all manner of warnings.
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*/
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#if 0
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struct HvReleaseData hvReleaseData = {
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.xDesc = 0xc8a5d9c4, /* "HvRD" ebcdic */
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.xSize = sizeof(struct HvReleaseData),
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.xVpdAreasPtrOffset = offsetof(struct naca_struct, xItVpdAreas),
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.xSlicNacaAddr = &naca, /* 64-bit Naca address */
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.xMsNucDataOffset = 0x4800, /* offset of LparMap within loadarea (see head.S) */
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.xTagsMode = 1, /* tags inactive */
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.xAddressSize = 0, /* 64 bit */
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.xNoSharedProcs = 0, /* shared processors */
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.xNoHMT = 0, /* HMT allowed */
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.xRsvd2 = 6, /* TEMP: This allows non-GA driver */
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.xMsNucDataOffset = (u32)((unsigned long)&xLparMap - KERNELBASE),
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.xFlags = HVREL_TAGSINACTIVE /* tags inactive */
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/* 64 bit */
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/* shared processors */
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/* HMT allowed */
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| 6, /* TEMP: This allows non-GA driver */
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.xVrmIndex = 4, /* We are v5r2m0 */
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.xMinSupportedPlicVrmIndex = 3, /* v5r1m0 */
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.xMinCompatablePlicVrmIndex = 3, /* v5r1m0 */
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@ -51,6 +70,63 @@ struct HvReleaseData hvReleaseData = {
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0xa7, 0x40, 0xf2, 0x4b,
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0xf4, 0x4b, 0xf6, 0xf4 },
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};
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#endif
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extern struct HvReleaseData hvReleaseData;
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static void __attribute_used__ hvReleaseData_wrapper(void)
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{
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/* This doesn't appear to need any alignment (even 4 byte) */
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asm volatile (
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" lparMapPhys = xLparMap - %3\n"
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" .data\n"
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" .globl hvReleaseData\n"
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"hvReleaseData:\n"
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" .long 0xc8a5d9c4\n" /* xDesc */
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/* "HvRD" in ebcdic */
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" .short %0\n" /* xSize */
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" .short %1\n" /* xVpdAreasPtrOffset */
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" .llong naca\n" /* xSlicNacaAddr */
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" .long lparMapPhys\n" /* xMsNucDataOffset */
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" .long 0\n" /* xRsvd1 */
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" .short %2\n" /* xFlags */
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" .short 4\n" /* xVrmIndex - v5r2m0 */
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" .short 3\n" /* xMinSupportedPlicVrmIndex - v5r1m0 */
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" .short 3\n" /* xMinCompatablePlicVrmIndex - v5r1m0 */
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" .long 0xd38995a4\n" /* xVrmName */
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" .long 0xa740f24b\n" /* "Linux 2.4.64" ebcdic */
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" .long 0xf44bf6f4\n"
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" . = hvReleaseData + %0\n"
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" .previous\n"
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: : "i"(sizeof(hvReleaseData)),
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"i"(offsetof(struct naca_struct, xItVpdAreas)),
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"i"(HVREL_TAGSINACTIVE /* tags inactive, 64 bit, */
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/* shared processors, HMT allowed */
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| 6), /* TEMP: This allows non-GA drivers */
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"i"(KERNELBASE)
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);
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}
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struct LparMap __attribute__((aligned (16))) xLparMap = {
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.xNumberEsids = HvEsidsToMap,
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.xNumberRanges = HvRangesToMap,
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.xSegmentTableOffs = STAB0_PAGE,
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.xEsids = {
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{ .xKernelEsid = GET_ESID(KERNELBASE),
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.xKernelVsid = KERNEL_VSID(KERNELBASE), },
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{ .xKernelEsid = GET_ESID(VMALLOCBASE),
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.xKernelVsid = KERNEL_VSID(VMALLOCBASE), },
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},
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.xRanges = {
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{ .xPages = HvPagesToMap,
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.xOffset = 0,
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.xVPN = KERNEL_VSID(KERNELBASE) << (SID_SHIFT - PAGE_SHIFT),
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},
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},
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};
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extern void system_reset_iSeries(void);
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extern void machine_check_iSeries(void);
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@ -522,36 +522,9 @@ __end_interrupts:
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#ifdef CONFIG_PPC_ISERIES
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.globl naca
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naca:
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.llong itVpdAreas
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/*
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* The iSeries LPAR map is at this fixed address
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* so that the HvReleaseData structure can address
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* it with a 32-bit offset.
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*
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* The VSID values below are dependent on the
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* VSID generation algorithm. See include/asm/mmu_context.h.
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*/
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. = 0x4800
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.llong 2 /* # ESIDs to be mapped by hypervisor */
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.llong 1 /* # memory ranges to be mapped by hypervisor */
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.llong STAB0_PAGE /* Page # of segment table within load area */
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.llong 0 /* Reserved */
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.llong 0 /* Reserved */
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.llong 0 /* Reserved */
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.llong 0 /* Reserved */
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.llong 0 /* Reserved */
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.llong (KERNELBASE>>SID_SHIFT)
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.llong 0x408f92c94 /* KERNELBASE VSID */
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/* We have to list the bolted VMALLOC segment here, too, so that it
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* will be restored on shared processor switch */
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.llong (VMALLOCBASE>>SID_SHIFT)
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.llong 0xf09b89af5 /* VMALLOCBASE VSID */
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.llong 8192 /* # pages to map (32 MB) */
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.llong 0 /* Offset from start of loadarea to start of map */
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.llong 0x408f92c940000 /* VPN of first page to map */
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.llong itVpdAreas
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.llong 0 /* xRamDisk */
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.llong 0 /* xRamDiskSize */
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. = 0x6100
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@ -39,6 +39,11 @@
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* know that this PLIC does not support running an OS "that old".
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*/
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#define HVREL_TAGSINACTIVE 0x8000
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#define HVREL_32BIT 0x4000
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#define HVREL_NOSHAREDPROCS 0x2000
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#define HVREL_NOHMT 0x1000
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struct HvReleaseData {
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u32 xDesc; /* Descriptor "HvRD" ebcdic x00-x03 */
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u16 xSize; /* Size of this control block x04-x05 */
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@ -46,11 +51,7 @@ struct HvReleaseData {
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struct naca_struct *xSlicNacaAddr; /* Virt addr of SLIC NACA x08-x0F */
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u32 xMsNucDataOffset; /* Offset of Linux Mapping Data x10-x13 */
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u32 xRsvd1; /* Reserved x14-x17 */
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u16 xTagsMode:1; /* 0 == tags active, 1 == tags inactive */
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u16 xAddressSize:1; /* 0 == 64-bit, 1 == 32-bit */
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u16 xNoSharedProcs:1; /* 0 == shared procs, 1 == no shared */
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u16 xNoHMT:1; /* 0 == allow HMT, 1 == no HMT */
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u16 xRsvd2:12; /* Reserved x18-x19 */
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u16 xFlags;
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u16 xVrmIndex; /* VRM Index of OS image x1A-x1B */
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u16 xMinSupportedPlicVrmIndex; /* Min PLIC level (soft) x1C-x1D */
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u16 xMinCompatablePlicVrmIndex; /* Min PLIC levelP (hard) x1E-x1F */
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@ -49,19 +49,26 @@
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* entry to map the Esid to the Vsid.
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*/
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#define HvEsidsToMap 2
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#define HvRangesToMap 1
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/* Hypervisor initially maps 32MB of the load area */
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#define HvPagesToMap 8192
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struct LparMap {
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u64 xNumberEsids; // Number of ESID/VSID pairs (1)
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u64 xNumberRanges; // Number of VA ranges to map (1)
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u64 xSegmentTableOffs; // Page number within load area of seg table (0)
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u64 xNumberEsids; // Number of ESID/VSID pairs
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u64 xNumberRanges; // Number of VA ranges to map
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u64 xSegmentTableOffs; // Page number within load area of seg table
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u64 xRsvd[5];
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u64 xKernelEsid; // Esid used to map kernel load (0x0C00000000)
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u64 xKernelVsid; // Vsid used to map kernel load (0x0C00000000)
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u64 xPages; // Number of pages to be mapped (8192)
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u64 xOffset; // Offset from start of load area (0)
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u64 xVPN; // Virtual Page Number (0x000C000000000000)
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struct {
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u64 xKernelEsid; // Esid used to map kernel load
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u64 xKernelVsid; // Vsid used to map kernel load
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} xEsids[HvEsidsToMap];
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struct {
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u64 xPages; // Number of pages to be mapped
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u64 xOffset; // Offset from start of load area
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u64 xVPN; // Virtual Page Number
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} xRanges[HvRangesToMap];
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};
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extern struct LparMap xLparMap;
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@ -338,6 +338,9 @@ static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
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| (ea >> SID_SHIFT));
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}
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#define VSID_SCRAMBLE(pvsid) (((pvsid) * VSID_MULTIPLIER) % VSID_MODULUS)
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#define KERNEL_VSID(ea) VSID_SCRAMBLE(GET_ESID(ea))
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#endif /* __ASSEMBLY */
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#endif /* _PPC64_MMU_H_ */
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