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riscv: inline set_pgdir into its only caller 

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
This commit is contained in:
Christoph Hellwig 2018-01-09 15:00:34 +01:00 committed by Palmer Dabbelt
parent 7549cdf59d
commit 4889dec6c8
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GPG Key ID: EF4CA1502CCBAB41
1 changed files with 6 additions and 11 deletions
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17
arch/riscv/include/asm/mmu_context.h
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@ -39,16 +39,6 @@ static inline void destroy_context(struct mm_struct *mm)
{ {
} }
static inline void set_pgdir(pgd_t *pgd)
{
/*
* Use the old spbtr name instead of using the current satp
* name to support binutils 2.29 which doesn't know about the
* privileged ISA 1.10 yet.
*/
csr_write(sptbr, virt_to_pfn(next->pgd) | SATP_MODE);
}
/* /*
* When necessary, performs a deferred icache flush for the given MM context, * When necessary, performs a deferred icache flush for the given MM context,
* on the local CPU. RISC-V has no direct mechanism for instruction cache * on the local CPU. RISC-V has no direct mechanism for instruction cache
@ -93,7 +83,12 @@ static inline void switch_mm(struct mm_struct *prev,
cpumask_clear_cpu(cpu, mm_cpumask(prev)); cpumask_clear_cpu(cpu, mm_cpumask(prev));
cpumask_set_cpu(cpu, mm_cpumask(next)); cpumask_set_cpu(cpu, mm_cpumask(next));
set_pgdir(next->pgd); /*
* Use the old spbtr name instead of using the current satp
* name to support binutils 2.29 which doesn't know about the
* privileged ISA 1.10 yet.
*/
csr_write(sptbr, virt_to_pfn(next->pgd) | SATP_MODE);
local_flush_tlb_all(); local_flush_tlb_all();
flush_icache_deferred(next); flush_icache_deferred(next);