Merge branch 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few fixes for amdgpu and ttm for 4.8 - fix a ttm regression caused by the new pipelining code - fixes for mullins on amdgpu - updated golden settings for amdgpu * 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux: drm/ttm: Wait for a BO to become idle before unbinding it from GTT drm/amdgpu: update golden setting of polaris10 drm/amdgpu: update golden setting of stoney drm/amdgpu: update golden setting of polaris11 drm/amdgpu: update golden setting of carrizo drm/amdgpu: update golden setting of iceland drm/amd/amdgpu: change pptable output format from ASCII to binary drm/amdgpu/ci: add mullins to default case for smc ucode drm/amdgpu/gmc7: add missing mullins case
This commit is contained in:
commit
4872850a19
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@ -305,7 +305,7 @@ static ssize_t amdgpu_get_pp_table(struct device *dev,
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struct drm_device *ddev = dev_get_drvdata(dev);
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struct amdgpu_device *adev = ddev->dev_private;
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char *table = NULL;
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int size, i;
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int size;
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if (adev->pp_enabled)
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size = amdgpu_dpm_get_pp_table(adev, &table);
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@ -315,10 +315,7 @@ static ssize_t amdgpu_get_pp_table(struct device *dev,
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if (size >= PAGE_SIZE)
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size = PAGE_SIZE - 1;
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for (i = 0; i < size; i++) {
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sprintf(buf + i, "%02x", table[i]);
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}
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sprintf(buf + i, "\n");
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memcpy(buf, table, size);
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return size;
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}
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@ -335,7 +335,7 @@ static int amdgpu_move_vram_ram(struct ttm_buffer_object *bo,
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if (unlikely(r)) {
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goto out_cleanup;
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}
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r = ttm_bo_move_ttm(bo, true, no_wait_gpu, new_mem);
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r = ttm_bo_move_ttm(bo, true, interruptible, no_wait_gpu, new_mem);
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out_cleanup:
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ttm_bo_mem_put(bo, &tmp_mem);
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return r;
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@ -368,7 +368,7 @@ static int amdgpu_move_ram_vram(struct ttm_buffer_object *bo,
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if (unlikely(r)) {
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return r;
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}
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r = ttm_bo_move_ttm(bo, true, no_wait_gpu, &tmp_mem);
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r = ttm_bo_move_ttm(bo, true, interruptible, no_wait_gpu, &tmp_mem);
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if (unlikely(r)) {
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goto out_cleanup;
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}
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@ -5779,6 +5779,7 @@ static int ci_dpm_init_microcode(struct amdgpu_device *adev)
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break;
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case CHIP_KAVERI:
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case CHIP_KABINI:
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case CHIP_MULLINS:
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default: BUG();
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}
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@ -270,7 +270,8 @@ static const u32 tonga_mgcg_cgcg_init[] =
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static const u32 golden_settings_polaris11_a11[] =
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{
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mmCB_HW_CONTROL, 0xfffdf3cf, 0x00006208,
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mmCB_HW_CONTROL, 0x0000f3cf, 0x00007208,
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mmCB_HW_CONTROL_2, 0x0f000000, 0x0f000000,
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mmCB_HW_CONTROL_3, 0x000001ff, 0x00000040,
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mmDB_DEBUG2, 0xf00fffff, 0x00000400,
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mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
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@ -279,7 +280,7 @@ static const u32 golden_settings_polaris11_a11[] =
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mmPA_SC_RASTER_CONFIG_1, 0x0000003f, 0x00000000,
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mmRLC_CGCG_CGLS_CTRL, 0x00000003, 0x0001003c,
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mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
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mmSQ_CONFIG, 0x07f80000, 0x07180000,
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mmSQ_CONFIG, 0x07f80000, 0x01180000,
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mmTA_CNTL_AUX, 0x000f000f, 0x000b0000,
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mmTCC_CTRL, 0x00100000, 0xf31fff7f,
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mmTCP_ADDR_CONFIG, 0x000003ff, 0x000000f3,
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@ -301,8 +302,8 @@ static const u32 polaris11_golden_common_all[] =
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static const u32 golden_settings_polaris10_a11[] =
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{
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mmATC_MISC_CG, 0x000c0fc0, 0x000c0200,
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mmCB_HW_CONTROL, 0xfffdf3cf, 0x00007208,
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mmCB_HW_CONTROL_2, 0, 0x0f000000,
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mmCB_HW_CONTROL, 0x0001f3cf, 0x00007208,
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mmCB_HW_CONTROL_2, 0x0f000000, 0x0f000000,
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mmCB_HW_CONTROL_3, 0x000001ff, 0x00000040,
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mmDB_DEBUG2, 0xf00fffff, 0x00000400,
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mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
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@ -409,6 +410,7 @@ static const u32 golden_settings_iceland_a11[] =
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mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000,
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mmPA_SC_RASTER_CONFIG, 0x3f3fffff, 0x00000002,
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mmPA_SC_RASTER_CONFIG_1, 0x0000003f, 0x00000000,
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mmRLC_CGCG_CGLS_CTRL, 0x00000003, 0x0000003c,
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mmSQ_RANDOM_WAVE_PRI, 0x001fffff, 0x000006fd,
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mmTA_CNTL_AUX, 0x000f000f, 0x000b0000,
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mmTCC_CTRL, 0x00100000, 0xf31fff7f,
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@ -505,8 +507,10 @@ static const u32 cz_golden_settings_a11[] =
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mmGB_GPU_ID, 0x0000000f, 0x00000000,
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mmPA_SC_ENHANCE, 0xffffffff, 0x00000001,
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mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000,
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mmRLC_CGCG_CGLS_CTRL, 0x00000003, 0x0000003c,
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mmSQ_RANDOM_WAVE_PRI, 0x001fffff, 0x000006fd,
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mmTA_CNTL_AUX, 0x000f000f, 0x00010000,
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mmTCC_CTRL, 0x00100000, 0xf31fff7f,
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mmTCC_EXE_DISABLE, 0x00000002, 0x00000002,
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mmTCP_ADDR_CONFIG, 0x0000000f, 0x000000f3,
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mmTCP_CHAN_STEER_LO, 0xffffffff, 0x00001302
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@ -144,6 +144,7 @@ static int gmc_v7_0_init_microcode(struct amdgpu_device *adev)
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break;
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case CHIP_KAVERI:
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case CHIP_KABINI:
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case CHIP_MULLINS:
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return 0;
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default: BUG();
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}
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@ -103,6 +103,11 @@ static const u32 stoney_mgcg_cgcg_init[] =
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mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104
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};
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static const u32 golden_settings_stoney_common[] =
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{
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mmMC_HUB_RDREQ_UVD, MC_HUB_RDREQ_UVD__PRESCALE_MASK, 0x00000004,
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mmMC_RD_GRP_OTH, MC_RD_GRP_OTH__UVD_MASK, 0x00600000
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};
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static void gmc_v8_0_init_golden_registers(struct amdgpu_device *adev)
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{
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@ -142,6 +147,9 @@ static void gmc_v8_0_init_golden_registers(struct amdgpu_device *adev)
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amdgpu_program_register_sequence(adev,
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stoney_mgcg_cgcg_init,
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(const u32)ARRAY_SIZE(stoney_mgcg_cgcg_init));
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amdgpu_program_register_sequence(adev,
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golden_settings_stoney_common,
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(const u32)ARRAY_SIZE(golden_settings_stoney_common));
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break;
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default:
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break;
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@ -1151,7 +1151,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
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if (ret)
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goto out;
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ret = ttm_bo_move_ttm(bo, true, no_wait_gpu, new_mem);
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ret = ttm_bo_move_ttm(bo, true, intr, no_wait_gpu, new_mem);
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out:
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ttm_bo_mem_put(bo, &tmp_mem);
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return ret;
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@ -1179,7 +1179,7 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
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if (ret)
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return ret;
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ret = ttm_bo_move_ttm(bo, true, no_wait_gpu, &tmp_mem);
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ret = ttm_bo_move_ttm(bo, true, intr, no_wait_gpu, &tmp_mem);
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if (ret)
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goto out;
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@ -346,7 +346,7 @@ static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
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if (unlikely(r)) {
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goto out_cleanup;
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}
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r = ttm_bo_move_ttm(bo, true, no_wait_gpu, new_mem);
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r = ttm_bo_move_ttm(bo, true, interruptible, no_wait_gpu, new_mem);
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out_cleanup:
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ttm_bo_mem_put(bo, &tmp_mem);
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return r;
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@ -379,7 +379,7 @@ static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
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if (unlikely(r)) {
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return r;
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}
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r = ttm_bo_move_ttm(bo, true, no_wait_gpu, &tmp_mem);
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r = ttm_bo_move_ttm(bo, true, interruptible, no_wait_gpu, &tmp_mem);
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if (unlikely(r)) {
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goto out_cleanup;
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}
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@ -354,7 +354,8 @@ static int ttm_bo_handle_move_mem(struct ttm_buffer_object *bo,
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if (!(old_man->flags & TTM_MEMTYPE_FLAG_FIXED) &&
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!(new_man->flags & TTM_MEMTYPE_FLAG_FIXED))
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ret = ttm_bo_move_ttm(bo, evict, no_wait_gpu, mem);
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ret = ttm_bo_move_ttm(bo, evict, interruptible, no_wait_gpu,
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mem);
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else if (bdev->driver->move)
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ret = bdev->driver->move(bo, evict, interruptible,
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no_wait_gpu, mem);
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@ -45,7 +45,7 @@ void ttm_bo_free_old_node(struct ttm_buffer_object *bo)
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}
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int ttm_bo_move_ttm(struct ttm_buffer_object *bo,
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bool evict,
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bool evict, bool interruptible,
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bool no_wait_gpu, struct ttm_mem_reg *new_mem)
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{
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struct ttm_tt *ttm = bo->ttm;
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@ -53,6 +53,14 @@ int ttm_bo_move_ttm(struct ttm_buffer_object *bo,
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int ret;
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if (old_mem->mem_type != TTM_PL_SYSTEM) {
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ret = ttm_bo_wait(bo, interruptible, no_wait_gpu);
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if (unlikely(ret != 0)) {
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if (ret != -ERESTARTSYS)
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pr_err("Failed to expire sync object before unbinding TTM\n");
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return ret;
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}
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ttm_tt_unbind(ttm);
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ttm_bo_free_old_node(bo);
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ttm_flag_masked(&old_mem->placement, TTM_PL_FLAG_SYSTEM,
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@ -962,6 +962,7 @@ void ttm_mem_io_free(struct ttm_bo_device *bdev,
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*
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* @bo: A pointer to a struct ttm_buffer_object.
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* @evict: 1: This is an eviction. Don't try to pipeline.
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* @interruptible: Sleep interruptible if waiting.
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* @no_wait_gpu: Return immediately if the GPU is busy.
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* @new_mem: struct ttm_mem_reg indicating where to move.
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*
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@ -976,7 +977,7 @@ void ttm_mem_io_free(struct ttm_bo_device *bdev,
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*/
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extern int ttm_bo_move_ttm(struct ttm_buffer_object *bo,
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bool evict, bool no_wait_gpu,
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bool evict, bool interruptible, bool no_wait_gpu,
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struct ttm_mem_reg *new_mem);
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/**
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