ASoC: davinci: let platform data define edma queue numbers
Currently the EDMA queue to be used by for servicing ASP through internal RAM is fixed to EDMAQ_0 and that to service internal RAM from external RAM is fixed to EDMAQ_1. This may not be the desirable configuration on all platforms. For example, on DM365, queue 0 has large fifo size and is more suitable for video transfers. Having audio and video transfers on the same queue may lead to starvation on audio side. platform data as defined currently passes a queue number to the driver but that remains unused inside the driver. Fix this by defining one queue each for ASP and RAM transfers in the platform data and using it inside the driver. Since EDMAQ_0 maps to 0, thats the queue that will be used if the asp queue number is not initialized. None of the platforms currently utilize ping-pong transfers through internal RAM so that functionality remains unchanged too. This patch has been tested on DM644x and OMAP-L138 EVMs. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -208,7 +208,7 @@ static struct snd_platform_data da830_evm_snd_data = {
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.num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
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.tdm_slots = 2,
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.serial_dir = da830_iis_serializer_direction,
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.eventq_no = EVENTQ_0,
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.asp_chan_q = EVENTQ_0,
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.version = MCASP_VERSION_2,
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.txnumevt = 1,
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.rxnumevt = 1,
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@ -342,7 +342,7 @@ static struct snd_platform_data da850_evm_snd_data = {
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.num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
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.tdm_slots = 2,
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.serial_dir = da850_iis_serializer_direction,
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.eventq_no = EVENTQ_1,
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.asp_chan_q = EVENTQ_1,
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.version = MCASP_VERSION_2,
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.txnumevt = 1,
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.rxnumevt = 1,
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@ -323,7 +323,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = {
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.num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
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.tdm_slots = 2,
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.serial_dir = dm646x_iis_serializer_direction,
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.eventq_no = EVENTQ_0,
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.asp_chan_q = EVENTQ_0,
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},
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{
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.tx_dma_offset = 0x400,
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@ -332,7 +332,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = {
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.num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
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.tdm_slots = 32,
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.serial_dir = dm646x_dit_serializer_direction,
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.eventq_no = EVENTQ_0,
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.asp_chan_q = EVENTQ_0,
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},
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};
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@ -52,7 +52,8 @@
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struct snd_platform_data {
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u32 tx_dma_offset;
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u32 rx_dma_offset;
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enum dma_event_q eventq_no; /* event queue number */
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enum dma_event_q asp_chan_q; /* event queue number for ASP channel */
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enum dma_event_q ram_chan_q; /* event queue number for RAM channel */
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unsigned int codec_fmt;
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/*
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* Allowing this is more efficient and eliminates left and right swaps
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@ -648,6 +648,8 @@ static int davinci_i2s_probe(struct platform_device *pdev)
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struct snd_platform_data *pdata = pdev->dev.platform_data;
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struct davinci_mcbsp_dev *dev;
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struct resource *mem, *ioarea, *res;
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enum dma_event_q asp_chan_q = EVENTQ_0;
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enum dma_event_q ram_chan_q = EVENTQ_1;
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int ret;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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@ -676,7 +678,15 @@ static int davinci_i2s_probe(struct platform_device *pdev)
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pdata->sram_size_capture;
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dev->clk_input_pin = pdata->clk_input_pin;
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dev->i2s_accurate_sck = pdata->i2s_accurate_sck;
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asp_chan_q = pdata->asp_chan_q;
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ram_chan_q = pdata->ram_chan_q;
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}
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dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK].asp_chan_q = asp_chan_q;
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dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK].ram_chan_q = ram_chan_q;
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dev->dma_params[SNDRV_PCM_STREAM_CAPTURE].asp_chan_q = asp_chan_q;
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dev->dma_params[SNDRV_PCM_STREAM_CAPTURE].ram_chan_q = ram_chan_q;
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dev->clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(dev->clk)) {
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ret = -ENODEV;
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@ -890,7 +890,8 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
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dev->rxnumevt = pdata->rxnumevt;
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dma_data = &dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK];
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dma_data->eventq_no = pdata->eventq_no;
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dma_data->asp_chan_q = pdata->asp_chan_q;
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dma_data->ram_chan_q = pdata->ram_chan_q;
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dma_data->dma_addr = (dma_addr_t) (pdata->tx_dma_offset +
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io_v2p(dev->base));
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@ -904,7 +905,8 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
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dma_data->channel = res->start;
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dma_data = &dev->dma_params[SNDRV_PCM_STREAM_CAPTURE];
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dma_data->eventq_no = pdata->eventq_no;
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dma_data->asp_chan_q = pdata->asp_chan_q;
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dma_data->ram_chan_q = pdata->ram_chan_q;
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dma_data->dma_addr = (dma_addr_t)(pdata->rx_dma_offset +
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io_v2p(dev->base));
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@ -381,7 +381,7 @@ static int request_ping_pong(struct snd_pcm_substream *substream,
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/* Request ram master channel */
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link = prtd->ram_channel = edma_alloc_channel(EDMA_CHANNEL_ANY,
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davinci_pcm_dma_irq, substream,
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EVENTQ_1);
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prtd->params->ram_chan_q);
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if (link < 0)
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goto exit1;
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@ -477,7 +477,8 @@ static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
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/* Request asp master DMA channel */
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link = prtd->asp_channel = edma_alloc_channel(params->channel,
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davinci_pcm_dma_irq, substream, EVENTQ_0);
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davinci_pcm_dma_irq, substream,
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prtd->params->asp_chan_q);
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if (link < 0)
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goto exit1;
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@ -21,7 +21,8 @@ struct davinci_pcm_dma_params {
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unsigned short acnt;
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dma_addr_t dma_addr; /* device physical address for DMA */
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unsigned sram_size;
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enum dma_event_q eventq_no; /* event queue number */
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enum dma_event_q asp_chan_q; /* event queue number for ASP channel */
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enum dma_event_q ram_chan_q; /* event queue number for RAM channel */
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unsigned char data_type; /* xfer data type */
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unsigned char convert_mono_stereo;
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unsigned int fifo_level;
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