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Merge series "ASoC: pcm512x: Patch series to set fmt from `set_fmt()`" from Kirill Marinushkin <kmarinushkin@birdec.com>: 

Set format from `set_fmt()` func instead of `hw_params()`, plus supportive
commits

Kirill Marinushkin (4):
  ASoC: pcm512x: Fix not setting word length if DAIFMT_CBS_CFS
  ASoC: pcm512x: Rearrange operations in `hw_params()`
  ASoC: pcm512x: Move format check into `set_fmt()`
  ASoC: pcm512x: Add support for more data formats

 sound/soc/codecs/pcm512x.c | 134 ++++++++++++++++++++++++++++-----------------
 1 file changed, 84 insertions(+), 50 deletions(-)

--
2.13.6
This commit is contained in:
Mark Brown 2020-11-16 23:23:48 +00:00
parent 60a973862f 25d27c4f68
commit 47f667afe7
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
1 changed files with 84 additions and 50 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

134
sound/soc/codecs/pcm512x.c
View File

@ -1168,8 +1168,6 @@ static int pcm512x_hw_params(struct snd_pcm_substream *substream,
struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
int alen;
int gpio;
int clock_output;
int master_mode;
int ret;
dev_dbg(component->dev, "hw_params %u Hz, %u channels\n",
@ -1195,19 +1193,15 @@ static int pcm512x_hw_params(struct snd_pcm_substream *substream,
return -EINVAL;
}
switch (pcm512x->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBS_CFS:
ret = regmap_update_bits(pcm512x->regmap,
PCM512x_BCLK_LRCLK_CFG,
PCM512x_BCKP
| PCM512x_BCKO | PCM512x_LRKO,
0);
if (ret != 0) {
dev_err(component->dev,
"Failed to enable slave mode: %d\n", ret);
return ret;
}
ret = regmap_update_bits(pcm512x->regmap, PCM512x_I2S_1,
PCM512x_ALEN, alen);
if (ret != 0) {
dev_err(component->dev, "Failed to set frame size: %d\n", ret);
return ret;
}
if ((pcm512x->fmt & SND_SOC_DAIFMT_MASTER_MASK) ==
SND_SOC_DAIFMT_CBS_CFS) {
ret = regmap_update_bits(pcm512x->regmap, PCM512x_ERROR_DETECT,
PCM512x_DCAS, 0);
if (ret != 0) {
@ -1216,24 +1210,7 @@ static int pcm512x_hw_params(struct snd_pcm_substream *substream,
ret);
return ret;
}
return 0;
case SND_SOC_DAIFMT_CBM_CFM:
clock_output = PCM512x_BCKO | PCM512x_LRKO;
master_mode = PCM512x_RLRK | PCM512x_RBCK;
break;
case SND_SOC_DAIFMT_CBM_CFS:
clock_output = PCM512x_BCKO;
master_mode = PCM512x_RBCK;
break;
default:
return -EINVAL;
}
ret = regmap_update_bits(pcm512x->regmap, PCM512x_I2S_1,
PCM512x_ALEN, alen);
if (ret != 0) {
dev_err(component->dev, "Failed to set frame size: %d\n", ret);
return ret;
goto skip_pll;
}
if (pcm512x->pll_out) {
@ -1316,25 +1293,7 @@ static int pcm512x_hw_params(struct snd_pcm_substream *substream,
dev_err(component->dev, "Failed to enable pll: %d\n", ret);
return ret;
}
}
ret = regmap_update_bits(pcm512x->regmap, PCM512x_BCLK_LRCLK_CFG,
PCM512x_BCKP | PCM512x_BCKO | PCM512x_LRKO,
clock_output);
if (ret != 0) {
dev_err(component->dev, "Failed to enable clock output: %d\n", ret);
return ret;
}
ret = regmap_update_bits(pcm512x->regmap, PCM512x_MASTER_MODE,
PCM512x_RLRK | PCM512x_RBCK,
master_mode);
if (ret != 0) {
dev_err(component->dev, "Failed to enable master mode: %d\n", ret);
return ret;
}
if (pcm512x->pll_out) {
gpio = PCM512x_G1OE << (pcm512x->pll_out - 1);
ret = regmap_update_bits(pcm512x->regmap, PCM512x_GPIO_EN,
gpio, gpio);
@ -1368,6 +1327,7 @@ static int pcm512x_hw_params(struct snd_pcm_substream *substream,
return ret;
}
skip_pll:
return 0;
}
@ -1375,6 +1335,80 @@ static int pcm512x_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
struct snd_soc_component *component = dai->component;
struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component);
int afmt;
int offset = 0;
int clock_output;
int master_mode;
int ret;
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBS_CFS:
clock_output = 0;
master_mode = 0;
break;
case SND_SOC_DAIFMT_CBM_CFM:
clock_output = PCM512x_BCKO | PCM512x_LRKO;
master_mode = PCM512x_RLRK | PCM512x_RBCK;
break;
case SND_SOC_DAIFMT_CBM_CFS:
clock_output = PCM512x_BCKO;
master_mode = PCM512x_RBCK;
break;
default:
return -EINVAL;
}
ret = regmap_update_bits(pcm512x->regmap, PCM512x_BCLK_LRCLK_CFG,
PCM512x_BCKP | PCM512x_BCKO | PCM512x_LRKO,
clock_output);
if (ret != 0) {
dev_err(component->dev, "Failed to enable clock output: %d\n", ret);
return ret;
}
ret = regmap_update_bits(pcm512x->regmap, PCM512x_MASTER_MODE,
PCM512x_RLRK | PCM512x_RBCK,
master_mode);
if (ret != 0) {
dev_err(component->dev, "Failed to enable master mode: %d\n", ret);
return ret;
}
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
afmt = PCM512x_AFMT_I2S;
break;
case SND_SOC_DAIFMT_RIGHT_J:
afmt = PCM512x_AFMT_RTJ;
break;
case SND_SOC_DAIFMT_LEFT_J:
afmt = PCM512x_AFMT_LTJ;
break;
case SND_SOC_DAIFMT_DSP_A:
offset = 1;
fallthrough;
case SND_SOC_DAIFMT_DSP_B:
afmt = PCM512x_AFMT_DSP;
break;
default:
dev_err(component->dev, "unsupported DAI format: 0x%x\n",
pcm512x->fmt);
return -EINVAL;
}
ret = regmap_update_bits(pcm512x->regmap, PCM512x_I2S_1,
PCM512x_AFMT, afmt);
if (ret != 0) {
dev_err(component->dev, "Failed to set data format: %d\n", ret);
return ret;
}
ret = regmap_update_bits(pcm512x->regmap, PCM512x_I2S_2,
0xFF, offset);
if (ret != 0) {
dev_err(component->dev, "Failed to set data offset: %d\n", ret);
return ret;
}
pcm512x->fmt = fmt;