pinctrl: meson-gxl: Add SPI pins for the SPICC controller
The SPICC controller has dedicated SPI pins, this patchs add the pins definition in the GXL pinctrl driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -141,6 +141,11 @@ static const unsigned int nor_q_pins[] = { PIN(BOOT_12, EE_OFF) };
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static const unsigned int nor_c_pins[] = { PIN(BOOT_13, EE_OFF) };
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static const unsigned int nor_cs_pins[] = { PIN(BOOT_15, EE_OFF) };
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static const unsigned int spi_mosi_pins[] = { PIN(GPIOX_8, EE_OFF) };
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static const unsigned int spi_miso_pins[] = { PIN(GPIOX_9, EE_OFF) };
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static const unsigned int spi_ss0_pins[] = { PIN(GPIOX_10, EE_OFF) };
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static const unsigned int spi_sclk_pins[] = { PIN(GPIOX_11, EE_OFF) };
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static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) };
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static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) };
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static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) };
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@ -405,6 +410,10 @@ static struct meson_pmx_group meson_gxl_periphs_groups[] = {
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GROUP(pwm_a, 5, 25),
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GROUP(pwm_e, 5, 15),
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GROUP(pwm_f_x, 5, 14),
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GROUP(spi_mosi, 5, 3),
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GROUP(spi_miso, 5, 2),
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GROUP(spi_ss0, 5, 1),
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GROUP(spi_sclk, 5, 0),
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/* Bank Z */
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GROUP(eth_mdio, 4, 23),
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@ -560,6 +569,10 @@ static const char * const nor_groups[] = {
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"nor_d", "nor_q", "nor_c", "nor_cs",
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};
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static const char * const spi_groups[] = {
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"spi_mosi", "spi_miso", "spi_ss0", "spi_sclk",
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};
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static const char * const sdcard_groups[] = {
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"sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3",
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"sdcard_cmd", "sdcard_clk",
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@ -693,6 +706,7 @@ static struct meson_pmx_func meson_gxl_periphs_functions[] = {
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FUNCTION(gpio_periphs),
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FUNCTION(emmc),
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FUNCTION(nor),
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FUNCTION(spi),
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FUNCTION(sdcard),
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FUNCTION(sdio),
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FUNCTION(nand),
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