sh: fix READ/WRITE redefinition warnings
kernel.h defines READ and WRITE, so rename the SH math-emu macros
to MREAD and MWRITE.
Fixes these warnings:
.../arch/sh/math-emu/math.c:54: warning: "WRITE" redefined
54 | #define WRITE(d,a) ({if(put_user(d, (typeof (d) __user *)a)) return -EFAULT;})
In file included from ../arch/sh/math-emu/math.c:10:
.../include/linux/kernel.h:37: note: this is the location of the previous definition
37 | #define WRITE 1
.../arch/sh/math-emu/math.c:55: warning: "READ" redefined
55 | #define READ(d,a) ({if(get_user(d, (typeof (d) __user *)a)) return -EFAULT;})
In file included from ../arch/sh/math-emu/math.c:10:
.../include/linux/kernel.h:36: note: this is the location of the previous definition
36 | #define READ 0
Fixes: 4b565680d1
("sh: math-emu support")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Cc: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rich Felker <dalias@libc.org>
This commit is contained in:
parent
b929926f01
commit
475c3f5995
|
@ -51,8 +51,8 @@
|
|||
#define Rn (regs->regs[n])
|
||||
#define Rm (regs->regs[m])
|
||||
|
||||
#define WRITE(d,a) ({if(put_user(d, (typeof (d) __user *)a)) return -EFAULT;})
|
||||
#define READ(d,a) ({if(get_user(d, (typeof (d) __user *)a)) return -EFAULT;})
|
||||
#define MWRITE(d,a) ({if(put_user(d, (typeof (d) __user *)a)) return -EFAULT;})
|
||||
#define MREAD(d,a) ({if(get_user(d, (typeof (d) __user *)a)) return -EFAULT;})
|
||||
|
||||
#define PACK_S(r,f) FP_PACK_SP(&r,f)
|
||||
#define UNPACK_S(f,r) FP_UNPACK_SP(f,&r)
|
||||
|
@ -157,11 +157,11 @@ fmov_idx_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
|
|||
{
|
||||
if (FPSCR_SZ) {
|
||||
FMOV_EXT(n);
|
||||
READ(FRn, Rm + R0 + 4);
|
||||
MREAD(FRn, Rm + R0 + 4);
|
||||
n++;
|
||||
READ(FRn, Rm + R0);
|
||||
MREAD(FRn, Rm + R0);
|
||||
} else {
|
||||
READ(FRn, Rm + R0);
|
||||
MREAD(FRn, Rm + R0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -173,11 +173,11 @@ fmov_mem_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
|
|||
{
|
||||
if (FPSCR_SZ) {
|
||||
FMOV_EXT(n);
|
||||
READ(FRn, Rm + 4);
|
||||
MREAD(FRn, Rm + 4);
|
||||
n++;
|
||||
READ(FRn, Rm);
|
||||
MREAD(FRn, Rm);
|
||||
} else {
|
||||
READ(FRn, Rm);
|
||||
MREAD(FRn, Rm);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -189,12 +189,12 @@ fmov_inc_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
|
|||
{
|
||||
if (FPSCR_SZ) {
|
||||
FMOV_EXT(n);
|
||||
READ(FRn, Rm + 4);
|
||||
MREAD(FRn, Rm + 4);
|
||||
n++;
|
||||
READ(FRn, Rm);
|
||||
MREAD(FRn, Rm);
|
||||
Rm += 8;
|
||||
} else {
|
||||
READ(FRn, Rm);
|
||||
MREAD(FRn, Rm);
|
||||
Rm += 4;
|
||||
}
|
||||
|
||||
|
@ -207,11 +207,11 @@ fmov_reg_idx(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
|
|||
{
|
||||
if (FPSCR_SZ) {
|
||||
FMOV_EXT(m);
|
||||
WRITE(FRm, Rn + R0 + 4);
|
||||
MWRITE(FRm, Rn + R0 + 4);
|
||||
m++;
|
||||
WRITE(FRm, Rn + R0);
|
||||
MWRITE(FRm, Rn + R0);
|
||||
} else {
|
||||
WRITE(FRm, Rn + R0);
|
||||
MWRITE(FRm, Rn + R0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -223,11 +223,11 @@ fmov_reg_mem(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
|
|||
{
|
||||
if (FPSCR_SZ) {
|
||||
FMOV_EXT(m);
|
||||
WRITE(FRm, Rn + 4);
|
||||
MWRITE(FRm, Rn + 4);
|
||||
m++;
|
||||
WRITE(FRm, Rn);
|
||||
MWRITE(FRm, Rn);
|
||||
} else {
|
||||
WRITE(FRm, Rn);
|
||||
MWRITE(FRm, Rn);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -240,12 +240,12 @@ fmov_reg_dec(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
|
|||
if (FPSCR_SZ) {
|
||||
FMOV_EXT(m);
|
||||
Rn -= 8;
|
||||
WRITE(FRm, Rn + 4);
|
||||
MWRITE(FRm, Rn + 4);
|
||||
m++;
|
||||
WRITE(FRm, Rn);
|
||||
MWRITE(FRm, Rn);
|
||||
} else {
|
||||
Rn -= 4;
|
||||
WRITE(FRm, Rn);
|
||||
MWRITE(FRm, Rn);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -445,11 +445,11 @@ id_sys(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, u16 code)
|
|||
case 0x4052:
|
||||
case 0x4062:
|
||||
Rn -= 4;
|
||||
WRITE(*reg, Rn);
|
||||
MWRITE(*reg, Rn);
|
||||
break;
|
||||
case 0x4056:
|
||||
case 0x4066:
|
||||
READ(*reg, Rn);
|
||||
MREAD(*reg, Rn);
|
||||
Rn += 4;
|
||||
break;
|
||||
default:
|
||||
|
|
Loading…
Reference in New Issue