sb_edac: allow different dram_rule arrays
This is in preparation for Ivy Bridge support Signed-off-by: Aristeu Rozanski <arozansk@redhat.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
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@ -83,11 +83,10 @@ static int probed;
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#define PCI_DEVICE_ID_INTEL_SBRIDGE_IMC_ERR3 0x3c77 /* 16.7 */
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/* Devices 12 Function 6, Offsets 0x80 to 0xcc */
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static const u32 dram_rule[] = {
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static const u32 sbridge_dram_rule[] = {
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0x80, 0x88, 0x90, 0x98, 0xa0,
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0xa8, 0xb0, 0xb8, 0xc0, 0xc8,
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};
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#define MAX_SAD ARRAY_SIZE(dram_rule)
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#define SAD_LIMIT(reg) ((GET_BITFIELD(reg, 6, 25) << 26) | 0x3ffffff)
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#define DRAM_ATTR(reg) GET_BITFIELD(reg, 2, 3)
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@ -279,6 +278,8 @@ struct sbridge_info {
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u32 rankcfgr;
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u64 (*get_tolm)(struct sbridge_pvt *pvt);
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u64 (*get_tohm)(struct sbridge_pvt *pvt);
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const u32 *dram_rule;
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u8 max_sad;
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};
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struct sbridge_channel {
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@ -673,9 +674,9 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
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* algorithm bellow.
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*/
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prv = 0;
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for (n_sads = 0; n_sads < MAX_SAD; n_sads++) {
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for (n_sads = 0; n_sads < pvt->info.max_sad; n_sads++) {
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/* SAD_LIMIT Address range is 45:26 */
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pci_read_config_dword(pvt->pci_sad0, dram_rule[n_sads],
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pci_read_config_dword(pvt->pci_sad0, pvt->info.dram_rule[n_sads],
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®);
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limit = SAD_LIMIT(reg);
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@ -847,8 +848,8 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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/*
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* Step 1) Get socket
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*/
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for (n_sads = 0; n_sads < MAX_SAD; n_sads++) {
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pci_read_config_dword(pvt->pci_sad0, dram_rule[n_sads],
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for (n_sads = 0; n_sads < pvt->info.max_sad; n_sads++) {
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pci_read_config_dword(pvt->pci_sad0, pvt->info.dram_rule[n_sads],
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®);
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if (!DRAM_RULE_ENABLE(reg))
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@ -863,7 +864,7 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
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break;
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prv = limit;
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}
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if (n_sads == MAX_SAD) {
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if (n_sads == pvt->info.max_sad) {
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sprintf(msg, "Can't discover the memory socket");
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return -EINVAL;
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}
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@ -1678,6 +1679,8 @@ static int sbridge_register_mci(struct sbridge_dev *sbridge_dev)
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mci->ctl_page_to_phys = NULL;
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pvt->info.get_tolm = sbridge_get_tolm;
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pvt->info.get_tohm = sbridge_get_tohm;
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pvt->info.dram_rule = sbridge_dram_rule;
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pvt->info.max_sad = ARRAY_SIZE(sbridge_dram_rule);
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/* Set the function pointer to an actual operation function */
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mci->edac_check = sbridge_check_error;
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