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[IA64-SGI] disable TIOCA GART TLB prefetching 

Patch to disable SGI TIOCA GART TLB prefetching due to hw bug.

Signed-off-by: Mark Maule <maule@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Mark Maule 2005-04-25 13:18:02 -07:00 committed by Tony Luck
parent e96c9b4779
commit 4628d7cada
1 changed files with 3 additions and 3 deletions
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6
arch/ia64/sn/pci/tioca_provider.c
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@ -171,15 +171,15 @@ tioca_gart_init(struct tioca_kernel *tioca_kern)
* use agp op-combining
* use GET semantics to fetch memory
* participate in coherency domain
* prefetch TLB entries
* DISABLE GART PREFETCHING due to hw bug tracked in SGI PV930029
*/
ca_base->ca_control1 |= CA_AGPDMA_OP_ENB_COMBDELAY; /* PV895469 ? */
ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM);
ca_base->ca_control2 |= (0x2ull << CA_GART_MEM_PARAM_SHFT);
tioca_kern->ca_gart_iscoherent = 1;
ca_base->ca_control2 |=
(CA_GART_WR_PREFETCH_ENB | CA_GART_RD_PREFETCH_ENB);
ca_base->ca_control2 &=
~(CA_GART_WR_PREFETCH_ENB | CA_GART_RD_PREFETCH_ENB);
/*
* Unmask GART fetch error interrupts. Clear residual errors first.