ARC: remove the unused platform helpers from dma mapping API
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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@ -117,10 +117,6 @@ config CPU_BIG_ENDIAN
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help
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Build kernel for Big Endian Mode of ARC CPU
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# If a platform can't work with 0x8000_0000 based dma_addr_t
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config ARC_PLAT_NEEDS_CPU_TO_DMA
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bool
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config SMP
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bool "Symmetric Multi-Processing (Incomplete)"
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default n
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@ -14,23 +14,6 @@
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#include <asm-generic/dma-coherent.h>
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#include <asm/cacheflush.h>
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#ifndef CONFIG_ARC_PLAT_NEEDS_CPU_TO_DMA
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/*
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* dma_map_* API take cpu addresses, which is kernel logical address in the
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* untranslated address space (0x8000_0000) based. The dma address (bus addr)
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* ideally needs to be 0x0000_0000 based hence these glue routines.
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* However given that intermediate bus bridges can ignore the high bit, we can
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* do with these routines being no-ops.
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* If a platform/device comes up which sriclty requires 0 based bus addr
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* (e.g. AHB-PCI bridge on Angel4 board), then it can provide it's own versions
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*/
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#define plat_dma_addr_to_kernel(dev, addr) ((unsigned long)(addr))
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#define plat_kernel_addr_to_dma(dev, ptr) ((dma_addr_t)(ptr))
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#else
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#include <plat/dma_addr.h>
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#endif
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void *dma_alloc_noncoherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp);
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@ -94,7 +77,7 @@ dma_map_single(struct device *dev, void *cpu_addr, size_t size,
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enum dma_data_direction dir)
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{
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_dma_cache_sync((unsigned long)cpu_addr, size, dir);
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return plat_kernel_addr_to_dma(dev, cpu_addr);
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return (dma_addr_t)cpu_addr;
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}
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static inline void
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@ -147,16 +130,14 @@ static inline void
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dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir)
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{
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_dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle), size,
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DMA_FROM_DEVICE);
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_dma_cache_sync(dma_handle, size, DMA_FROM_DEVICE);
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}
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static inline void
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dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir)
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{
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_dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle), size,
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DMA_TO_DEVICE);
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_dma_cache_sync(dma_handle, size, DMA_TO_DEVICE);
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}
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static inline void
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@ -164,8 +145,7 @@ dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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_dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle) + offset,
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size, DMA_FROM_DEVICE);
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_dma_cache_sync(dma_handle + offset, size, DMA_FROM_DEVICE);
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}
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static inline void
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@ -173,8 +153,7 @@ dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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_dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle) + offset,
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size, DMA_TO_DEVICE);
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_dma_cache_sync(dma_handle + offset, size, DMA_TO_DEVICE);
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}
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static inline void
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@ -14,8 +14,6 @@
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* Cache bit off in the TLB entry.
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*
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* The default DMA address == Phy address which is 0x8000_0000 based.
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* A platform/device can make it zero based, by over-riding
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* plat_{dma,kernel}_addr_to_{kernel,dma}
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*/
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#include <linux/dma-mapping.h>
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@ -37,7 +35,7 @@ void *dma_alloc_noncoherent(struct device *dev, size_t size,
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return NULL;
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/* This is bus address, platform dependent */
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*dma_handle = plat_kernel_addr_to_dma(dev, paddr);
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*dma_handle = (dma_addr_t)paddr;
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return paddr;
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}
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@ -46,8 +44,7 @@ EXPORT_SYMBOL(dma_alloc_noncoherent);
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void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle)
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{
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free_pages_exact((void *)plat_dma_addr_to_kernel(dev, dma_handle),
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size);
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free_pages_exact((void *)dma_handle, size);
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}
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EXPORT_SYMBOL(dma_free_noncoherent);
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@ -67,7 +64,7 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
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memset(kvaddr, 0, size);
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/* This is bus address, platform dependent */
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*dma_handle = plat_kernel_addr_to_dma(dev, paddr);
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*dma_handle = (dma_addr_t)paddr;
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return kvaddr;
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}
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@ -78,8 +75,7 @@ void dma_free_coherent(struct device *dev, size_t size, void *kvaddr,
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{
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iounmap((void __force __iomem *)kvaddr);
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free_pages_exact((void *)plat_dma_addr_to_kernel(dev, dma_handle),
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size);
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free_pages_exact((void *)dma_handle, size);
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}
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EXPORT_SYMBOL(dma_free_coherent);
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