ARM: OMAP2+: Fix build if CONFIG_SMP is not set
Looks like I only partially fixed up things if CONFIG_SMP
is not set for the recent kexec changes. We don't have
boot_secondary available without SMP as reported by Arnd.
Fixes: 0573b957fc
("ARM: OMAP4+: Prevent CPU1 related hang with kexec")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
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@ -24,6 +24,16 @@
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#define AUX_CORE_BOOT0_PA 0x48281800
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#define API_HYP_ENTRY 0x102
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ENTRY(omap_secondary_startup)
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#ifdef CONFIG_SMP
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b secondary_startup
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#else
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/* Should never get here */
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again: wfi
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b again
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#endif
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#ENDPROC(omap_secondary_startup)
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/*
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* OMAP5 specific entry point for secondary CPU to jump from ROM
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* code. This routine also provides a holding flag into which
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@ -39,7 +49,7 @@ wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
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and r4, r4, #0x0f
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cmp r0, r4
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bne wait
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b secondary_startup
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b omap_secondary_startup
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ENDPROC(omap5_secondary_startup)
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/*
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* Same as omap5_secondary_startup except we call into the ROM to
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@ -59,7 +69,7 @@ wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
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adr r0, hyp_boot
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smc #0
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hyp_boot:
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b secondary_startup
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b omap_secondary_startup
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ENDPROC(omap5_secondary_hyp_startup)
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/*
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* OMAP4 specific entry point for secondary CPU to jump from ROM
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@ -82,7 +92,7 @@ hold: ldr r12,=0x103
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* we've been released from the wait loop,secondary_stack
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* should now contain the SVC stack for this core
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*/
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b secondary_startup
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b omap_secondary_startup
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ENDPROC(omap4_secondary_startup)
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ENTRY(omap4460_secondary_startup)
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@ -119,5 +129,5 @@ hold_2: ldr r12,=0x103
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* we've been released from the wait loop,secondary_stack
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* should now contain the SVC stack for this core
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*/
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b secondary_startup
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b omap_secondary_startup
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ENDPROC(omap4460_secondary_startup)
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