staging: fbtft: Use standard MIPI DCS command defines for tinylcd

This patch makes use of the standard MIPI Display Command Set to remove
some of the magic constants found in source code.

Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Priit Laes 2015-12-20 20:36:06 +02:00 committed by Greg Kroah-Hartman
parent a79cb3901e
commit 440176316c
1 changed files with 14 additions and 14 deletions

View File

@ -18,6 +18,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <video/mipi_display.h>
#include "fbtft.h"
@ -38,7 +39,7 @@ static int init_display(struct fbtft_par *par)
write_reg(par, 0xB4, 0x02);
write_reg(par, 0xB6, 0x00, 0x22, 0x3B);
write_reg(par, 0xB7, 0x07);
write_reg(par, 0x36, 0x58);
write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0x58);
write_reg(par, 0xF0, 0x36, 0xA5, 0xD3);
write_reg(par, 0xE5, 0x80);
write_reg(par, 0xE5, 0x01);
@ -47,24 +48,23 @@ static int init_display(struct fbtft_par *par)
write_reg(par, 0xF0, 0x36, 0xA5, 0x53);
write_reg(par, 0xE0, 0x00, 0x35, 0x33, 0x00, 0x00, 0x00,
0x00, 0x35, 0x33, 0x00, 0x00, 0x00);
write_reg(par, 0x3A, 0x55);
write_reg(par, 0x11);
write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
udelay(250);
write_reg(par, 0x29);
write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
return 0;
}
static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
{
/* Column address */
write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
/* Row address */
write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
/* Memory write */
write_reg(par, 0x2C);
write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
}
static int set_var(struct fbtft_par *par)
@ -72,19 +72,19 @@ static int set_var(struct fbtft_par *par)
switch (par->info->var.rotate) {
case 270:
write_reg(par, 0xB6, 0x00, 0x02, 0x3B);
write_reg(par, 0x36, 0x28);
write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0x28);
break;
case 180:
write_reg(par, 0xB6, 0x00, 0x22, 0x3B);
write_reg(par, 0x36, 0x58);
write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0x58);
break;
case 90:
write_reg(par, 0xB6, 0x00, 0x22, 0x3B);
write_reg(par, 0x36, 0x38);
write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0x38);
break;
default:
write_reg(par, 0xB6, 0x00, 0x22, 0x3B);
write_reg(par, 0x36, 0x08);
write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0x08);
break;
}