KVM: arm/arm64: Do not inject spurious interrupts
When lowering a level-triggered line from userspace, we forgot to lower the pending bit on the emulated CPU interface and we also did not re-compute the pending_on_cpu bitmap for the CPU affected by the change. Update vgic_update_irq_pending() to fix the two issues above and also raise a warning in vgic_quue_irq_to_lr if we encounter an interrupt pending on a CPU which is neither marked active nor pending. [ Commit text reworked completely - Christoffer ] Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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@ -1132,7 +1132,8 @@ static void vgic_queue_irq_to_lr(struct kvm_vcpu *vcpu, int irq,
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kvm_debug("Set active, clear distributor: 0x%x\n", vlr.state);
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kvm_debug("Set active, clear distributor: 0x%x\n", vlr.state);
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vgic_irq_clear_active(vcpu, irq);
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vgic_irq_clear_active(vcpu, irq);
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vgic_update_state(vcpu->kvm);
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vgic_update_state(vcpu->kvm);
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} else if (vgic_dist_irq_is_pending(vcpu, irq)) {
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} else {
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WARN_ON(!vgic_dist_irq_is_pending(vcpu, irq));
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vlr.state |= LR_STATE_PENDING;
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vlr.state |= LR_STATE_PENDING;
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kvm_debug("Set pending: 0x%x\n", vlr.state);
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kvm_debug("Set pending: 0x%x\n", vlr.state);
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}
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}
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@ -1607,8 +1608,12 @@ static int vgic_update_irq_pending(struct kvm *kvm, int cpuid,
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} else {
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} else {
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if (level_triggered) {
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if (level_triggered) {
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vgic_dist_irq_clear_level(vcpu, irq_num);
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vgic_dist_irq_clear_level(vcpu, irq_num);
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if (!vgic_dist_irq_soft_pend(vcpu, irq_num))
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if (!vgic_dist_irq_soft_pend(vcpu, irq_num)) {
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vgic_dist_irq_clear_pending(vcpu, irq_num);
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vgic_dist_irq_clear_pending(vcpu, irq_num);
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vgic_cpu_irq_clear(vcpu, irq_num);
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if (!compute_pending_for_cpu(vcpu))
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clear_bit(cpuid, dist->irq_pending_on_cpu);
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}
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}
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}
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ret = false;
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ret = false;
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