MIPS: Fix typos and cleanup comment
Signed-off-by: Tony Wu <tung7970@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5535/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -347,7 +347,7 @@ struct gic_shared_intr_map {
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#define GIC_CPU_INT2 2 /* . */
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#define GIC_CPU_INT2 2 /* . */
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#define GIC_CPU_INT3 3 /* . */
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#define GIC_CPU_INT3 3 /* . */
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#define GIC_CPU_INT4 4 /* . */
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#define GIC_CPU_INT4 4 /* . */
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#define GIC_CPU_INT5 5 /* Core Interrupt 5 */
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#define GIC_CPU_INT5 5 /* Core Interrupt 7 */
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/* Local GIC interrupts. */
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/* Local GIC interrupts. */
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#define GIC_INT_TMR (GIC_CPU_INT5)
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#define GIC_INT_TMR (GIC_CPU_INT5)
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@ -207,9 +207,6 @@ unsigned long __stack_chk_guard __read_mostly;
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EXPORT_SYMBOL(__stack_chk_guard);
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EXPORT_SYMBOL(__stack_chk_guard);
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#endif
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#endif
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/*
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*
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*/
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struct mips_frame_info {
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struct mips_frame_info {
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void *func;
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void *func;
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unsigned long func_size;
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unsigned long func_size;
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@ -972,7 +972,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
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uasm_i_srl(p, ptr, ptr, 19);
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uasm_i_srl(p, ptr, ptr, 19);
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#else
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#else
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/*
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/*
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* smp_processor_id() << 3 is stored in CONTEXT.
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* smp_processor_id() << 2 is stored in CONTEXT.
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*/
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*/
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uasm_i_mfc0(p, ptr, C0_CONTEXT);
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uasm_i_mfc0(p, ptr, C0_CONTEXT);
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UASM_i_LA_mostly(p, tmp, pgdc);
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UASM_i_LA_mostly(p, tmp, pgdc);
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