PCI: pciehp: Make pcie_wait_cmd() self-contained
pcie_wait_cmd() waits for the controller to finish a hotplug command. Move the associated logic (to determine whether waiting is required and whether we're using interrupts or polling) from pcie_write_cmd() to pcie_wait_cmd(). No functional change. Tested-by: Rajat Jain <rajatxjain@gmail.com> (IDT 807a controller) Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org>
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@ -92,6 +92,7 @@ struct controller {
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struct slot *slot;
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struct slot *slot;
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wait_queue_head_t queue; /* sleep & wake process */
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wait_queue_head_t queue; /* sleep & wake process */
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u32 slot_cap;
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u32 slot_cap;
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u32 slot_ctrl;
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struct timer_list poll_timer;
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struct timer_list poll_timer;
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unsigned int cmd_busy:1;
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unsigned int cmd_busy:1;
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unsigned int no_cmd_complete:1;
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unsigned int no_cmd_complete:1;
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@ -129,16 +129,27 @@ static int pcie_poll_cmd(struct controller *ctrl)
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return 0; /* timeout */
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return 0; /* timeout */
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}
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}
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static void pcie_wait_cmd(struct controller *ctrl, int poll)
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static void pcie_wait_cmd(struct controller *ctrl)
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{
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{
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unsigned int msecs = pciehp_poll_mode ? 2500 : 1000;
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unsigned int msecs = pciehp_poll_mode ? 2500 : 1000;
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unsigned long timeout = msecs_to_jiffies(msecs);
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unsigned long timeout = msecs_to_jiffies(msecs);
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int rc;
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int rc;
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if (poll)
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/*
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rc = pcie_poll_cmd(ctrl);
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* If the controller does not generate notifications for command
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else
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* completions, we never need to wait between writes.
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*/
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if (ctrl->no_cmd_complete)
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return;
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if (!ctrl->cmd_busy)
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return;
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if (ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE &&
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ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE)
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rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout);
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rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout);
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else
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rc = pcie_poll_cmd(ctrl);
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if (!rc)
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if (!rc)
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ctrl_dbg(ctrl, "Command not completed in 1000 msec\n");
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ctrl_dbg(ctrl, "Command not completed in 1000 msec\n");
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}
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}
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@ -187,22 +198,12 @@ static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
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ctrl->cmd_busy = 1;
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ctrl->cmd_busy = 1;
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smp_mb();
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smp_mb();
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pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl);
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pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl);
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ctrl->slot_ctrl = slot_ctrl;
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/*
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/*
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* Wait for command completion.
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* Wait for command completion.
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*/
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*/
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if (!ctrl->no_cmd_complete) {
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pcie_wait_cmd(ctrl);
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int poll = 0;
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/*
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* if hotplug interrupt is not enabled or command
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* completed interrupt is not enabled, we need to poll
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* command completed event.
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*/
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if (!(slot_ctrl & PCI_EXP_SLTCTL_HPIE) ||
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!(slot_ctrl & PCI_EXP_SLTCTL_CCIE))
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poll = 1;
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pcie_wait_cmd(ctrl, poll);
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}
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mutex_unlock(&ctrl->ctrl_lock);
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mutex_unlock(&ctrl->ctrl_lock);
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}
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}
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