ARM: SAMSUNG: Move all platforms to new clocksource driver
This patch moves all Samsung platforms using PWM clocksource from legacy samsung-time to new samsung-pwm-timer driver. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
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1c161fd0d4
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4280506ac9
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@ -700,7 +700,7 @@ config ARCH_S3C24XX
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select ARCH_HAS_CPUFREQ
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select ARCH_HAS_CPUFREQ
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select ARCH_REQUIRE_GPIOLIB
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select ARCH_REQUIRE_GPIOLIB
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select CLKDEV_LOOKUP
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select CLKSRC_SAMSUNG_PWM
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select GENERIC_CLOCKEVENTS
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select GENERIC_CLOCKEVENTS
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select GPIO_SAMSUNG
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select GPIO_SAMSUNG
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select HAVE_CLK
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select HAVE_CLK
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@ -723,7 +723,7 @@ config ARCH_S3C64XX
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select ARCH_REQUIRE_GPIOLIB
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select ARCH_REQUIRE_GPIOLIB
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select ARM_VIC
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select ARM_VIC
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select CLKDEV_LOOKUP
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select CLKSRC_SAMSUNG_PWM
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select CPU_V6
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select CPU_V6
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select GENERIC_CLOCKEVENTS
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select GENERIC_CLOCKEVENTS
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select GPIO_SAMSUNG
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select GPIO_SAMSUNG
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@ -748,7 +748,7 @@ config ARCH_S3C64XX
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config ARCH_S5P64X0
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config ARCH_S5P64X0
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bool "Samsung S5P6440 S5P6450"
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bool "Samsung S5P6440 S5P6450"
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select CLKDEV_LOOKUP
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select CLKSRC_SAMSUNG_PWM
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select CPU_V6
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select CPU_V6
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select GENERIC_CLOCKEVENTS
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select GENERIC_CLOCKEVENTS
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select GPIO_SAMSUNG
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select GPIO_SAMSUNG
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@ -767,7 +767,7 @@ config ARCH_S5PC100
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bool "Samsung S5PC100"
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bool "Samsung S5PC100"
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select ARCH_REQUIRE_GPIOLIB
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select ARCH_REQUIRE_GPIOLIB
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select CLKDEV_LOOKUP
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select CLKSRC_SAMSUNG_PWM
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select CPU_V7
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select CPU_V7
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select GENERIC_CLOCKEVENTS
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select GENERIC_CLOCKEVENTS
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select GPIO_SAMSUNG
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select GPIO_SAMSUNG
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@ -787,7 +787,7 @@ config ARCH_S5PV210
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select ARCH_HAS_HOLES_MEMORYMODEL
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select ARCH_HAS_HOLES_MEMORYMODEL
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select ARCH_SPARSEMEM_ENABLE
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select ARCH_SPARSEMEM_ENABLE
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select CLKDEV_LOOKUP
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select CLKSRC_SAMSUNG_PWM
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select CPU_V7
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select CPU_V7
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select GENERIC_CLOCKEVENTS
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select GENERIC_CLOCKEVENTS
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select GPIO_SAMSUNG
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select GPIO_SAMSUNG
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@ -30,7 +30,6 @@ config CPU_S3C2410
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select S3C2410_CLOCK
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select S3C2410_CLOCK
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select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
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select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
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select S3C2410_PM if PM
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select S3C2410_PM if PM
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select SAMSUNG_HRT
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select SAMSUNG_WDT_RESET
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select SAMSUNG_WDT_RESET
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help
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help
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Support for S3C2410 and S3C2410A family from the S3C24XX line
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Support for S3C2410 and S3C2410A family from the S3C24XX line
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@ -42,7 +41,6 @@ config CPU_S3C2412
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select CPU_LLSERIAL_S3C2440
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select CPU_LLSERIAL_S3C2440
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select S3C2412_DMA if S3C24XX_DMA
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select S3C2412_DMA if S3C24XX_DMA
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select S3C2412_PM if PM
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select S3C2412_PM if PM
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select SAMSUNG_HRT
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help
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help
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Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
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Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
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@ -54,7 +52,6 @@ config CPU_S3C2416
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select S3C2443_COMMON
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select S3C2443_COMMON
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select S3C2443_DMA if S3C24XX_DMA
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select S3C2443_DMA if S3C24XX_DMA
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select SAMSUNG_CLKSRC
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select SAMSUNG_CLKSRC
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select SAMSUNG_HRT
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help
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help
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Support for the S3C2416 SoC from the S3C24XX line
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Support for the S3C2416 SoC from the S3C24XX line
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@ -65,7 +62,6 @@ config CPU_S3C2440
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select S3C2410_CLOCK
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select S3C2410_CLOCK
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select S3C2410_PM if PM
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select S3C2410_PM if PM
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select S3C2440_DMA if S3C24XX_DMA
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select S3C2440_DMA if S3C24XX_DMA
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select SAMSUNG_HRT
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help
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help
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Support for S3C2440 Samsung Mobile CPU based systems.
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Support for S3C2440 Samsung Mobile CPU based systems.
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@ -75,7 +71,6 @@ config CPU_S3C2442
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select CPU_LLSERIAL_S3C2440
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select CPU_LLSERIAL_S3C2440
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select S3C2410_CLOCK
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select S3C2410_CLOCK
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select S3C2410_PM if PM
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select S3C2410_PM if PM
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select SAMSUNG_HRT
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help
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help
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Support for S3C2442 Samsung Mobile CPU based systems.
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Support for S3C2442 Samsung Mobile CPU based systems.
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@ -91,7 +86,6 @@ config CPU_S3C2443
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select S3C2443_COMMON
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select S3C2443_COMMON
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select S3C2443_DMA if S3C24XX_DMA
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select S3C2443_DMA if S3C24XX_DMA
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select SAMSUNG_CLKSRC
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select SAMSUNG_CLKSRC
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select SAMSUNG_HRT
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help
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help
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Support for the S3C2443 SoC from the S3C24XX line
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Support for the S3C2443 SoC from the S3C24XX line
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@ -245,6 +245,22 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
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samsung_pwm_set_platdata(&s3c24xx_pwm_variant);
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samsung_pwm_set_platdata(&s3c24xx_pwm_variant);
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}
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}
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void __init samsung_set_timer_source(unsigned int event, unsigned int source)
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{
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s3c24xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
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s3c24xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
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}
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void __init samsung_timer_init(void)
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{
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unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
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IRQ_TIMER0, IRQ_TIMER1, IRQ_TIMER2, IRQ_TIMER3, IRQ_TIMER4,
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};
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samsung_pwm_clocksource_init(S3C_VA_TIMER,
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timer_irqs, &s3c24xx_pwm_variant);
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}
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/* Serial port registrations */
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/* Serial port registrations */
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#define S3C2410_PA_UART0 (S3C24XX_PA_UART)
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#define S3C2410_PA_UART0 (S3C24XX_PA_UART)
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@ -17,13 +17,11 @@ config PLAT_S3C64XX
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# Configuration options for the S3C6410 CPU
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# Configuration options for the S3C6410 CPU
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config CPU_S3C6400
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config CPU_S3C6400
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select SAMSUNG_HRT
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bool
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bool
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help
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help
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Enable S3C6400 CPU support
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Enable S3C6400 CPU support
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config CPU_S3C6410
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config CPU_S3C6410
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select SAMSUNG_HRT
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bool
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bool
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help
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help
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Enable S3C6410 CPU support
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Enable S3C6410 CPU support
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@ -43,7 +43,6 @@
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#include <plat/pm.h>
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#include <plat/pm.h>
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#include <plat/gpio-cfg.h>
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#include <plat/gpio-cfg.h>
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#include <plat/irq-uart.h>
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#include <plat/irq-uart.h>
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#include <plat/irq-vic-timer.h>
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#include <plat/pwm-core.h>
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#include <plat/pwm-core.h>
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#include <plat/regs-irqtype.h>
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#include <plat/regs-irqtype.h>
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#include <plat/regs-serial.h>
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#include <plat/regs-serial.h>
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@ -158,6 +157,23 @@ static struct samsung_pwm_variant s3c64xx_pwm_variant = {
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.tclk_mask = (1 << 7) | (1 << 6) | (1 << 5),
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.tclk_mask = (1 << 7) | (1 << 6) | (1 << 5),
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};
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};
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void __init samsung_set_timer_source(unsigned int event, unsigned int source)
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{
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s3c64xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
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s3c64xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
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}
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void __init samsung_timer_init(void)
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{
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unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
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IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
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IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
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};
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samsung_pwm_clocksource_init(S3C_VA_TIMER,
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timer_irqs, &s3c64xx_pwm_variant);
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}
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/* read cpu identification code */
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/* read cpu identification code */
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void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
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void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
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@ -206,9 +222,6 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
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/* initialise the pair of VICs */
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/* initialise the pair of VICs */
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vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
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vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
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vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
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vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
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/* add the timer sub-irqs */
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s3c_init_vic_timer_irq(5, IRQ_TIMER0);
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}
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}
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#define eint_offset(irq) ((irq) - IRQ_EINT(0))
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#define eint_offset(irq) ((irq) - IRQ_EINT(0))
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@ -11,14 +11,12 @@ config CPU_S5P6440
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bool
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bool
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select S5P_SLEEP if PM
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select S5P_SLEEP if PM
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select SAMSUNG_DMADEV
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select SAMSUNG_DMADEV
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select SAMSUNG_HRT
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select SAMSUNG_WAKEMASK if PM
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select SAMSUNG_WAKEMASK if PM
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help
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help
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Enable S5P6440 CPU support
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Enable S5P6440 CPU support
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config CPU_S5P6450
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config CPU_S5P6450
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bool
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bool
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select SAMSUNG_HRT
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select S5P_SLEEP if PM
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select S5P_SLEEP if PM
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select SAMSUNG_DMADEV
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select SAMSUNG_DMADEV
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select SAMSUNG_WAKEMASK if PM
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select SAMSUNG_WAKEMASK if PM
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@ -166,6 +166,23 @@ static struct samsung_pwm_variant s5p64x0_pwm_variant = {
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.tclk_mask = 0,
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.tclk_mask = 0,
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};
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};
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void __init samsung_set_timer_source(unsigned int event, unsigned int source)
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{
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s5p64x0_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
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s5p64x0_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
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}
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void __init samsung_timer_init(void)
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{
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unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
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IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
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IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
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};
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samsung_pwm_clocksource_init(S3C_VA_TIMER,
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timer_irqs, &s5p64x0_pwm_variant);
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}
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/*
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/*
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* s5p64x0_map_io
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* s5p64x0_map_io
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*
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*
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@ -11,7 +11,6 @@ config CPU_S5PC100
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bool
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bool
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select S5P_EXT_INT
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select S5P_EXT_INT
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select SAMSUNG_DMADEV
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select SAMSUNG_DMADEV
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select SAMSUNG_HRT
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help
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help
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Enable S5PC100 CPU support
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Enable S5PC100 CPU support
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@ -141,6 +141,23 @@ static struct samsung_pwm_variant s5pc100_pwm_variant = {
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.tclk_mask = (1 << 5),
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.tclk_mask = (1 << 5),
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};
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};
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void __init samsung_set_timer_source(unsigned int event, unsigned int source)
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{
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s5pc100_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
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s5pc100_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
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}
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void __init samsung_timer_init(void)
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{
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unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
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IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
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IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
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};
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samsung_pwm_clocksource_init(S3C_VA_TIMER,
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timer_irqs, &s5pc100_pwm_variant);
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}
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/*
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/*
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* s5pc100_map_io
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* s5pc100_map_io
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*
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*
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@ -15,7 +15,6 @@ config CPU_S5PV210
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select S5P_PM if PM
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select S5P_PM if PM
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select S5P_SLEEP if PM
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select S5P_SLEEP if PM
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select SAMSUNG_DMADEV
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select SAMSUNG_DMADEV
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select SAMSUNG_HRT
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help
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help
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Enable S5PV210 CPU support
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Enable S5PV210 CPU support
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@ -157,6 +157,23 @@ static struct samsung_pwm_variant s5pv210_pwm_variant = {
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.tclk_mask = (1 << 5),
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.tclk_mask = (1 << 5),
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};
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};
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void __init samsung_set_timer_source(unsigned int event, unsigned int source)
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{
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s5pv210_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
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s5pv210_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
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}
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void __init samsung_timer_init(void)
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{
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unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
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IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
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IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
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};
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samsung_pwm_clocksource_init(S3C_VA_TIMER,
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timer_irqs, &s5pv210_pwm_variant);
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}
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/*
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/*
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* s5pv210_map_io
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* s5pv210_map_io
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*
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*
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@ -19,7 +19,6 @@
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#include <mach/map.h>
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#include <mach/map.h>
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#include <plat/regs-timer.h>
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#include <plat/regs-timer.h>
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#include <plat/cpu.h>
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#include <plat/cpu.h>
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#include <plat/irq-vic-timer.h>
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void __init s5p_init_irq(u32 *vic, u32 num_vic)
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void __init s5p_init_irq(u32 *vic, u32 num_vic)
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||||||
{
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{
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||||||
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@ -30,6 +29,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
|
||||||
for (irq = 0; irq < num_vic; irq++)
|
for (irq = 0; irq < num_vic; irq++)
|
||||||
vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
|
vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
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||||||
#endif
|
#endif
|
||||||
|
|
||||||
s3c_init_vic_timer_irq(5, IRQ_TIMER0);
|
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue