mpt3sas: Manage MSI-X vectors according to HBA device type
1. Do not enable MSI-X vectors for SAS2008 B0 controllers 2. Enable a single MSI-X vector for the following controller: a. SAS2004 b. SAS2008 c. SAS2008_1 d. SAS2008_2 e. SAS2008_3 f. SAS2116_1 g. SAS2116_2 3. Enable Combined Reply Post Queue Support (i.e. 96 MSI-X vectors) for Gen3 Invader/Fury C0 and above revision HBAs 4. Enable Combined Reply Post Queue Support (i.e. 96 MSI-X vectors) for all Intruder and Cutlass HBAs Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com> Acked-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -1712,6 +1712,14 @@ _base_check_enable_msix(struct MPT3SAS_ADAPTER *ioc)
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int base;
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u16 message_control;
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/* Check whether controller SAS2008 B0 controller,
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* if it is SAS2008 B0 controller use IO-APIC instead of MSIX
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*/
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if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
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ioc->pdev->revision == SAS2_PCI_DEVICE_B0_REVISION) {
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return -EINVAL;
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}
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base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
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if (!base) {
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dfailprintk(ioc, pr_info(MPT3SAS_FMT "msix not supported\n",
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@ -1720,9 +1728,19 @@ _base_check_enable_msix(struct MPT3SAS_ADAPTER *ioc)
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}
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/* get msix vector count */
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pci_read_config_word(ioc->pdev, base + 2, &message_control);
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ioc->msix_vector_count = (message_control & 0x3FF) + 1;
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/* NUMA_IO not supported for older controllers */
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if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
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ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
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ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
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ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
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ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
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ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
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ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
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ioc->msix_vector_count = 1;
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else {
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pci_read_config_word(ioc->pdev, base + 2, &message_control);
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ioc->msix_vector_count = (message_control & 0x3FF) + 1;
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}
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dinitprintk(ioc, pr_info(MPT3SAS_FMT
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"msix is supported, vector_count(%d)\n",
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ioc->name, ioc->msix_vector_count));
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@ -4979,7 +4997,6 @@ mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc)
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{
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int r, i;
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int cpu_id, last_cpu_id = 0;
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u8 revision;
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dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
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__func__));
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@ -4999,20 +5016,6 @@ mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc)
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goto out_free_resources;
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}
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/* Check whether the controller revision is C0 or above.
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* only C0 and above revision controllers support 96 MSI-X vectors.
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*/
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revision = ioc->pdev->revision;
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if ((ioc->pdev->device == MPI25_MFGPAGE_DEVID_SAS3004 ||
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ioc->pdev->device == MPI25_MFGPAGE_DEVID_SAS3008 ||
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ioc->pdev->device == MPI25_MFGPAGE_DEVID_SAS3108_1 ||
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ioc->pdev->device == MPI25_MFGPAGE_DEVID_SAS3108_2 ||
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ioc->pdev->device == MPI25_MFGPAGE_DEVID_SAS3108_5 ||
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ioc->pdev->device == MPI25_MFGPAGE_DEVID_SAS3108_6) &&
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(revision >= 0x02))
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ioc->msix96_vector = 1;
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ioc->rdpq_array_enable_assigned = 0;
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ioc->dma_mask = 0;
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r = mpt3sas_base_map_resources(ioc);
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@ -142,6 +142,9 @@
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#define MPT_TARGET_FLAGS_DELETED 0x04
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#define MPT_TARGET_FASTPATH_IO 0x08
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#define SAS2_PCI_DEVICE_B0_REVISION (0x01)
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#define SAS3_PCI_DEVICE_C0_REVISION (0x02)
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/*
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* Intel HBA branding
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*/
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@ -7938,6 +7938,13 @@ _scsih_determine_hba_mpi_version(struct MPT3SAS_ADAPTER *ioc) {
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case MPI25_MFGPAGE_DEVID_SAS3108_5:
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case MPI25_MFGPAGE_DEVID_SAS3108_6:
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ioc->hba_mpi_version_belonged = MPI25_VERSION;
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/* Check whether the controller revision is C0 or above.
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* only C0 and above revision controllers support 96 MSI-X
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* vectors.
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*/
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if (ioc->pdev->revision >= SAS3_PCI_DEVICE_C0_REVISION)
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ioc->msix96_vector = 1;
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break;
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}
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}
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