i7core_edac: CodingStyle fixes
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Mauro Carvalho Chehab
parent
eb94fc402f
commit
41fcb7feed
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@ -113,7 +113,7 @@
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#define MC_DOD_NUMBANK(x) (((x) & MC_DOD_NUMBANK_MASK) >> 7)
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#define MC_DOD_NUMRANK_MASK ((1 << 6) | (1 << 5))
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#define MC_DOD_NUMRANK(x) (((x) & MC_DOD_NUMRANK_MASK) >> 5)
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#define MC_DOD_NUMROW_MASK ((1 << 4) | (1 << 3)| (1 << 2))
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#define MC_DOD_NUMROW_MASK ((1 << 4) | (1 << 3) | (1 << 2))
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#define MC_DOD_NUMROW(x) (((x) & MC_DOD_NUMROW_MASK) >> 2)
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#define MC_DOD_NUMCOL_MASK 3
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#define MC_DOD_NUMCOL(x) ((x) & MC_DOD_NUMCOL_MASK)
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@ -352,9 +352,8 @@ static int i7core_get_active_channels(int *channels, int *csrows)
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continue;
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/* Check if the channel is disabled */
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if (status & (1 << i)) {
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if (status & (1 << i))
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continue;
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}
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pdev = get_pdev_slot_func(i + 4, 1);
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if (!pdev) {
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@ -410,7 +409,7 @@ static int get_dimm_config(struct mem_ctl_info *mci)
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pvt->info.max_dod, pvt->info.ch_map);
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if (ECC_ENABLED(pvt)) {
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debugf0("ECC enabled with x%d SDCC\n", ECCx8(pvt) ?8:4);
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debugf0("ECC enabled with x%d SDCC\n", ECCx8(pvt) ? 8 : 4);
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if (ECCx8(pvt))
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mode = EDAC_S8ECD8ED;
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else
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@ -447,7 +446,7 @@ static int get_dimm_config(struct mem_ctl_info *mci)
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pci_read_config_dword(pvt->pci_ch[i][0],
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MC_CHANNEL_DIMM_INIT_PARAMS, &data);
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pvt->channel[i].ranks = (data & QUAD_RANK_PRESENT)? 4 : 2;
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pvt->channel[i].ranks = (data & QUAD_RANK_PRESENT) ? 4 : 2;
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if (data & REGISTERED_DIMM)
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mtype = MEM_RDDR3;
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@ -476,7 +475,7 @@ static int get_dimm_config(struct mem_ctl_info *mci)
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RDLCH(pvt->info.ch_map, i), WRLCH(pvt->info.ch_map, i),
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data,
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pvt->channel[i].ranks,
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(data & REGISTERED_DIMM)? 'R' : 'U');
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(data & REGISTERED_DIMM) ? 'R' : 'U');
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for (j = 0; j < 3; j++) {
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u32 banks, ranks, rows, cols;
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@ -550,9 +549,9 @@ static int get_dimm_config(struct mem_ctl_info *mci)
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pci_read_config_dword(pdev, MC_SAG_CH_5, &value[5]);
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pci_read_config_dword(pdev, MC_SAG_CH_6, &value[6]);
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pci_read_config_dword(pdev, MC_SAG_CH_7, &value[7]);
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printk("\t[%i] DIVBY3\tREMOVED\tOFFSET\n", i);
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debugf0("\t[%i] DIVBY3\tREMOVED\tOFFSET\n", i);
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for (j = 0; j < 8; j++)
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printk("\t\t%#x\t%#x\t%#x\n",
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debugf0("\t\t%#x\t%#x\t%#x\n",
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(value[j] >> 27) & 0x1,
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(value[j] >> 24) & 0x7,
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(value[j] && ((1 << 24) - 1)));
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@ -602,7 +601,7 @@ static ssize_t i7core_inject_section_store(struct mem_ctl_info *mci,
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int rc;
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if (pvt->inject.enable)
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disable_inject(mci);
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disable_inject(mci);
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rc = strict_strtoul(data, 10, &value);
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if ((rc < 0) || (value > 3))
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@ -635,7 +634,7 @@ static ssize_t i7core_inject_type_store(struct mem_ctl_info *mci,
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int rc;
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if (pvt->inject.enable)
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disable_inject(mci);
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disable_inject(mci);
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rc = strict_strtoul(data, 10, &value);
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if ((rc < 0) || (value > 7))
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@ -670,7 +669,7 @@ static ssize_t i7core_inject_eccmask_store(struct mem_ctl_info *mci,
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int rc;
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if (pvt->inject.enable)
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disable_inject(mci);
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disable_inject(mci);
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rc = strict_strtoul(data, 10, &value);
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if (rc < 0)
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@ -706,7 +705,7 @@ static ssize_t i7core_inject_addrmatch_store(struct mem_ctl_info *mci,
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int rc;
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if (pvt->inject.enable)
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disable_inject(mci);
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disable_inject(mci);
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do {
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cmd = strsep((char **) &data, ":");
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@ -716,7 +715,7 @@ static ssize_t i7core_inject_addrmatch_store(struct mem_ctl_info *mci,
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if (!val)
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return cmd - data;
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if (!strcasecmp(val,"any"))
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if (!strcasecmp(val, "any"))
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value = -1;
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else {
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rc = strict_strtol(val, 10, &value);
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@ -724,33 +723,33 @@ static ssize_t i7core_inject_addrmatch_store(struct mem_ctl_info *mci,
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return cmd - data;
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}
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if (!strcasecmp(cmd,"channel")) {
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if (!strcasecmp(cmd, "channel")) {
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if (value < 3)
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pvt->inject.channel = value;
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else
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return cmd - data;
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} else if (!strcasecmp(cmd,"dimm")) {
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} else if (!strcasecmp(cmd, "dimm")) {
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if (value < 4)
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pvt->inject.dimm = value;
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else
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return cmd - data;
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} else if (!strcasecmp(cmd,"rank")) {
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} else if (!strcasecmp(cmd, "rank")) {
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if (value < 4)
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pvt->inject.rank = value;
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else
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return cmd - data;
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} else if (!strcasecmp(cmd,"bank")) {
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} else if (!strcasecmp(cmd, "bank")) {
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if (value < 4)
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pvt->inject.bank = value;
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else
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return cmd - data;
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} else if (!strcasecmp(cmd,"page")) {
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} else if (!strcasecmp(cmd, "page")) {
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if (value <= 0xffff)
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pvt->inject.page = value;
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else
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return cmd - data;
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} else if (!strcasecmp(cmd,"col") ||
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!strcasecmp(cmd,"column")) {
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} else if (!strcasecmp(cmd, "col") ||
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!strcasecmp(cmd, "column")) {
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if (value <= 0x3fff)
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pvt->inject.col = value;
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else
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@ -923,7 +922,8 @@ static ssize_t i7core_inject_enable_store(struct mem_ctl_info *mci,
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pci_write_config_dword(pvt->pci_ch[pvt->inject.channel][0],
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MC_CHANNEL_ERROR_MASK, injectmask);
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debugf0("Error inject addr match 0x%016llx, ecc 0x%08x, inject 0x%08x\n",
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debugf0("Error inject addr match 0x%016llx, ecc 0x%08x,"
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" inject 0x%08x\n",
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mask, pvt->inject.eccmask, injectmask);
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@ -1048,7 +1048,7 @@ static int i7core_get_devices(void)
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"Device not found: PCI ID %04x:%04x "
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"(dev %d, func %d)\n",
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PCI_VENDOR_ID_INTEL, pci_devs[i].dev_id,
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pci_devs[i].dev,pci_devs[i].func);
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pci_devs[i].dev, pci_devs[i].func);
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/* Dev 3 function 2 only exists on chips with RDIMMs */
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if ((pci_devs[i].dev == 3) && (pci_devs[i].func == 2))
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@ -1231,12 +1231,12 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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/* Check the number of active and not disabled channels */
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rc = i7core_get_active_channels(&num_channels, &num_csrows);
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if (unlikely (rc < 0))
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if (unlikely(rc < 0))
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goto fail0;
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/* allocate a new MC control structure */
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mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0);
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if (unlikely (!mci)) {
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if (unlikely(!mci)) {
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rc = -ENOMEM;
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goto fail0;
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}
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@ -1249,7 +1249,12 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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memset(pvt, 0, sizeof(*pvt));
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mci->mc_idx = 0;
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mci->mtype_cap = MEM_FLAG_DDR3; /* FIXME: how to handle RDDR3? */
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/*
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* FIXME: how to handle RDDR3 at MCI level? It is possible to have
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* Mixed RDDR3/UDDR3 with Nehalem, provided that they are on different
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* memory channels
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*/
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mci->mtype_cap = MEM_FLAG_DDR3;
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mci->edac_ctl_cap = EDAC_FLAG_NONE;
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mci->edac_cap = EDAC_FLAG_NONE;
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mci->mod_name = "i7core_edac.c";
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@ -1263,7 +1268,7 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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/* Store pci devices at mci for faster access */
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rc = mci_bind_devs(mci);
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if (unlikely (rc < 0))
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if (unlikely(rc < 0))
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goto fail1;
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/* Get dimm basic config */
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@ -1283,7 +1288,7 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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/* allocating generic PCI control info */
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i7core_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR);
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if (unlikely (!i7core_pci)) {
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if (unlikely(!i7core_pci)) {
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printk(KERN_WARNING
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"%s(): Unable to create PCI control\n",
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__func__);
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