ARM: 7670/1: fix the memset fix
Commit 455bd4c430
("ARM: 7668/1: fix memset-related crashes caused by
recent GCC (4.7.2) optimizations") attempted to fix a compliance issue
with the memset return value. However the memset itself became broken
by that patch for misaligned pointers.
This fixes the above by branching over the entry code from the
misaligned fixup code to avoid reloading the original pointer.
Also, because the function entry alignment is wrong in the Thumb mode
compilation, that fixup code is moved to the end.
While at it, the entry instructions are slightly reworked to help dual
issue pipelines.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
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455bd4c430
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@ -14,31 +14,15 @@
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.text
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.align 5
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.word 0
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1: subs r2, r2, #4 @ 1 do we have enough
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blt 5f @ 1 bytes to align with?
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cmp r3, #2 @ 1
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strltb r1, [ip], #1 @ 1
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strleb r1, [ip], #1 @ 1
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strb r1, [ip], #1 @ 1
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add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
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/*
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* The pointer is now aligned and the length is adjusted. Try doing the
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* memset again.
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*/
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ENTRY(memset)
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/*
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* Preserve the contents of r0 for the return value.
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*/
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mov ip, r0
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ands r3, ip, #3 @ 1 unaligned?
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bne 1b @ 1
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ands r3, r0, #3 @ 1 unaligned?
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mov ip, r0 @ preserve r0 as return value
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bne 6f @ 1
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/*
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* we know that the pointer in ip is aligned to a word boundary.
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*/
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orr r1, r1, r1, lsl #8
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1: orr r1, r1, r1, lsl #8
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orr r1, r1, r1, lsl #16
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mov r3, r1
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cmp r2, #16
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@ -127,4 +111,13 @@ ENTRY(memset)
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tst r2, #1
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strneb r1, [ip], #1
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mov pc, lr
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6: subs r2, r2, #4 @ 1 do we have enough
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blt 5b @ 1 bytes to align with?
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cmp r3, #2 @ 1
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strltb r1, [ip], #1 @ 1
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strleb r1, [ip], #1 @ 1
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strb r1, [ip], #1 @ 1
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add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
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b 1b
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ENDPROC(memset)
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