Merge master.kernel.org:/pub/scm/linux/kernel/git/tglx/mtd-2.6
This commit is contained in:
Linus Torvalds
commit
4168f7a318
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|
@ -4,7 +4,7 @@
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*
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* (C) 2000 Red Hat. GPL'd
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*
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* $Id: cfi_cmdset_0001.c,v 1.185 2005/11/07 11:14:22 gleixner Exp $
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* $Id: cfi_cmdset_0001.c,v 1.186 2005/11/23 22:07:52 nico Exp $
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*
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*
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* 10/10/2000 Nicolas Pitre <nico@cam.org>
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@ -644,9 +644,8 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
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*
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* - contension arbitration is handled in the owner's context.
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*
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* The 'shared' struct can be read when its lock is taken.
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* However any writes to it can only be made when the current
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* owner's lock is also held.
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* The 'shared' struct can be read and/or written only when
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* its lock is taken.
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*/
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struct flchip_shared *shared = chip->priv;
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struct flchip *contender;
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@ -675,14 +674,13 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr
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}
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timeo = jiffies + HZ;
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spin_lock(&shared->lock);
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spin_unlock(contender->mutex);
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}
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/* We now own it */
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shared->writing = chip;
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if (mode == FL_ERASING)
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shared->erasing = chip;
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if (contender && contender != chip)
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spin_unlock(contender->mutex);
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spin_unlock(&shared->lock);
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}
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@ -1,7 +1,7 @@
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/*
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Common Flash Interface probe code.
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(C) 2000 Red Hat. GPL'd.
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$Id: cfi_probe.c,v 1.84 2005/11/07 11:14:23 gleixner Exp $
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$Id: cfi_probe.c,v 1.86 2005/11/29 14:48:31 gleixner Exp $
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*/
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#include <linux/config.h>
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@ -230,8 +230,8 @@ static int __xipram cfi_chip_setup(struct map_info *map,
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cfi_send_gen_cmd(0xaa, 0x555, base, map, cfi, cfi->device_type, NULL);
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cfi_send_gen_cmd(0x55, 0x2aa, base, map, cfi, cfi->device_type, NULL);
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cfi_send_gen_cmd(0x90, 0x555, base, map, cfi, cfi->device_type, NULL);
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cfi->mfr = cfi_read_query(map, base);
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cfi->id = cfi_read_query(map, base + ofs_factor);
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cfi->mfr = cfi_read_query16(map, base);
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cfi->id = cfi_read_query16(map, base + ofs_factor);
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/* Put it back into Read Mode */
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cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
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@ -426,7 +426,7 @@ static struct mtd_chip_driver cfi_chipdrv = {
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.module = THIS_MODULE
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};
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int __init cfi_probe_init(void)
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static int __init cfi_probe_init(void)
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{
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register_mtd_chip_driver(&cfi_chipdrv);
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return 0;
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@ -4,7 +4,7 @@
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* Copyright 2000,2001 David A. Schleef <ds@schleef.org>
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* 2000,2001 Lineo, Inc.
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*
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* $Id: sharp.c,v 1.16 2005/11/07 11:14:23 gleixner Exp $
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* $Id: sharp.c,v 1.17 2005/11/29 14:28:28 gleixner Exp $
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*
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* Devices supported:
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* LH28F016SCT Symmetrical block flash memory, 2Mx8
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@ -160,22 +160,28 @@ struct mtd_info *sharp_probe(struct map_info *map)
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return mtd;
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}
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static inline void sharp_send_cmd(struct map_info *map, unsigned long cmd, unsigned long adr)
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{
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map_word map_cmd;
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map_cmd.x[0] = cmd;
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map_write(map, map_cmd, adr);
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}
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static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
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{
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unsigned long tmp;
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map_word tmp, read0, read4;
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unsigned long base = 0;
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u32 read0, read4;
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int width = 4;
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tmp = map_read32(map, base+0);
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tmp = map_read(map, base+0);
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map_write32(map, CMD_READ_ID, base+0);
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sharp_send_cmd(map, CMD_READ_ID, base+0);
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read0=map_read32(map, base+0);
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read4=map_read32(map, base+4);
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if(read0 == 0x89898989){
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read0 = map_read(map, base+0);
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read4 = map_read(map, base+4);
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if(read0.x[0] == 0x89898989){
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printk("Looks like sharp flash\n");
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switch(read4){
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switch(read4.x[0]){
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case 0xaaaaaaaa:
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case 0xa0a0a0a0:
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/* aa - LH28F016SCT-L95 2Mx8, 32 64k blocks*/
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@ -197,16 +203,16 @@ static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
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return width;
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#endif
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default:
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printk("Sort-of looks like sharp flash, 0x%08x 0x%08x\n",
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read0,read4);
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printk("Sort-of looks like sharp flash, 0x%08lx 0x%08lx\n",
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read0.x[0], read4.x[0]);
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}
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}else if((map_read32(map, base+0) == CMD_READ_ID)){
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}else if((map_read(map, base+0).x[0] == CMD_READ_ID)){
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/* RAM, probably */
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printk("Looks like RAM\n");
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map_write32(map, tmp, base+0);
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map_write(map, tmp, base+0);
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}else{
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printk("Doesn't look like sharp flash, 0x%08x 0x%08x\n",
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read0,read4);
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printk("Doesn't look like sharp flash, 0x%08lx 0x%08lx\n",
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read0.x[0], read4.x[0]);
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}
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return 0;
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@ -215,7 +221,8 @@ static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd)
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/* This function returns with the chip->mutex lock held. */
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static int sharp_wait(struct map_info *map, struct flchip *chip)
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{
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int status, i;
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int i;
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map_word status;
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unsigned long timeo = jiffies + HZ;
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DECLARE_WAITQUEUE(wait, current);
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int adr = 0;
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@ -225,12 +232,12 @@ retry:
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switch(chip->state){
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case FL_READY:
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map_write32(map,CMD_READ_STATUS,adr);
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sharp_send_cmd(map, CMD_READ_STATUS, adr);
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chip->state = FL_STATUS;
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case FL_STATUS:
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for(i=0;i<100;i++){
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status = map_read32(map,adr);
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if((status & SR_READY)==SR_READY)
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status = map_read(map, adr);
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if((status.x[0] & SR_READY)==SR_READY)
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break;
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udelay(1);
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}
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@ -254,7 +261,7 @@ retry:
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goto retry;
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}
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map_write32(map,CMD_RESET, adr);
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sharp_send_cmd(map, CMD_RESET, adr);
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chip->state = FL_READY;
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@ -351,37 +358,39 @@ static int sharp_write_oneword(struct map_info *map, struct flchip *chip,
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int timeo;
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int try;
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int i;
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int status = 0;
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map_word data, status;
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status.x[0] = 0;
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ret = sharp_wait(map,chip);
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for(try=0;try<10;try++){
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map_write32(map,CMD_BYTE_WRITE,adr);
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sharp_send_cmd(map, CMD_BYTE_WRITE, adr);
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/* cpu_to_le32 -> hack to fix the writel be->le conversion */
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map_write32(map,cpu_to_le32(datum),adr);
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data.x[0] = cpu_to_le32(datum);
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map_write(map, data, adr);
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chip->state = FL_WRITING;
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timeo = jiffies + (HZ/2);
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map_write32(map,CMD_READ_STATUS,adr);
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sharp_send_cmd(map, CMD_READ_STATUS, adr);
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for(i=0;i<100;i++){
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status = map_read32(map,adr);
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if((status & SR_READY)==SR_READY)
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status = map_read(map, adr);
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if((status.x[0] & SR_READY) == SR_READY)
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break;
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}
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if(i==100){
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printk("sharp: timed out writing\n");
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}
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if(!(status&SR_ERRORS))
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if(!(status.x[0] & SR_ERRORS))
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break;
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printk("sharp: error writing byte at addr=%08lx status=%08x\n",adr,status);
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printk("sharp: error writing byte at addr=%08lx status=%08lx\n", adr, status.x[0]);
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map_write32(map,CMD_CLEAR_STATUS,adr);
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sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
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}
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map_write32(map,CMD_RESET,adr);
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sharp_send_cmd(map, CMD_RESET, adr);
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chip->state = FL_READY;
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wake_up(&chip->wq);
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@ -434,18 +443,18 @@ static int sharp_do_wait_for_ready(struct map_info *map, struct flchip *chip,
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{
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int ret;
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unsigned long timeo;
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int status;
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map_word status;
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DECLARE_WAITQUEUE(wait, current);
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map_write32(map,CMD_READ_STATUS,adr);
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status = map_read32(map,adr);
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sharp_send_cmd(map, CMD_READ_STATUS, adr);
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status = map_read(map, adr);
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timeo = jiffies + HZ;
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while(time_before(jiffies, timeo)){
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map_write32(map,CMD_READ_STATUS,adr);
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status = map_read32(map,adr);
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if((status & SR_READY)==SR_READY){
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sharp_send_cmd(map, CMD_READ_STATUS, adr);
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status = map_read(map, adr);
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if((status.x[0] & SR_READY)==SR_READY){
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ret = 0;
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goto out;
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}
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@ -476,7 +485,7 @@ static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip,
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{
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int ret;
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//int timeo;
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int status;
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map_word status;
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//int i;
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//printk("sharp_erase_oneblock()\n");
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@ -486,26 +495,26 @@ static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip,
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sharp_unlock_oneblock(map,chip,adr);
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#endif
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map_write32(map,CMD_BLOCK_ERASE_1,adr);
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map_write32(map,CMD_BLOCK_ERASE_2,adr);
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sharp_send_cmd(map, CMD_BLOCK_ERASE_1, adr);
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sharp_send_cmd(map, CMD_BLOCK_ERASE_2, adr);
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chip->state = FL_ERASING;
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ret = sharp_do_wait_for_ready(map,chip,adr);
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if(ret<0)return ret;
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|
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map_write32(map,CMD_READ_STATUS,adr);
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status = map_read32(map,adr);
|
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sharp_send_cmd(map, CMD_READ_STATUS, adr);
|
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status = map_read(map, adr);
|
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|
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if(!(status&SR_ERRORS)){
|
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map_write32(map,CMD_RESET,adr);
|
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if(!(status.x[0] & SR_ERRORS)){
|
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sharp_send_cmd(map, CMD_RESET, adr);
|
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chip->state = FL_READY;
|
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//spin_unlock_bh(chip->mutex);
|
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return 0;
|
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}
|
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|
||||
printk("sharp: error erasing block at addr=%08lx status=%08x\n",adr,status);
|
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map_write32(map,CMD_CLEAR_STATUS,adr);
|
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printk("sharp: error erasing block at addr=%08lx status=%08lx\n", adr, status.x[0]);
|
||||
sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
|
||||
|
||||
//spin_unlock_bh(chip->mutex);
|
||||
|
||||
|
|
@ -517,20 +526,20 @@ static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip,
|
|||
unsigned long adr)
|
||||
{
|
||||
int i;
|
||||
int status;
|
||||
map_word status;
|
||||
|
||||
map_write32(map,CMD_CLEAR_BLOCK_LOCKS_1,adr);
|
||||
map_write32(map,CMD_CLEAR_BLOCK_LOCKS_2,adr);
|
||||
sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_1, adr);
|
||||
sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_2, adr);
|
||||
|
||||
udelay(100);
|
||||
|
||||
status = map_read32(map,adr);
|
||||
printk("status=%08x\n",status);
|
||||
status = map_read(map, adr);
|
||||
printk("status=%08lx\n", status.x[0]);
|
||||
|
||||
for(i=0;i<1000;i++){
|
||||
//map_write32(map,CMD_READ_STATUS,adr);
|
||||
status = map_read32(map,adr);
|
||||
if((status & SR_READY)==SR_READY)
|
||||
//sharp_send_cmd(map, CMD_READ_STATUS, adr);
|
||||
status = map_read(map, adr);
|
||||
if((status.x[0] & SR_READY) == SR_READY)
|
||||
break;
|
||||
udelay(100);
|
||||
}
|
||||
|
|
@ -538,14 +547,14 @@ static void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip,
|
|||
printk("sharp: timed out unlocking block\n");
|
||||
}
|
||||
|
||||
if(!(status&SR_ERRORS)){
|
||||
map_write32(map,CMD_RESET,adr);
|
||||
if(!(status.x[0] & SR_ERRORS)){
|
||||
sharp_send_cmd(map, CMD_RESET, adr);
|
||||
chip->state = FL_READY;
|
||||
return;
|
||||
}
|
||||
|
||||
printk("sharp: error unlocking block at addr=%08lx status=%08x\n",adr,status);
|
||||
map_write32(map,CMD_CLEAR_STATUS,adr);
|
||||
printk("sharp: error unlocking block at addr=%08lx status=%08lx\n", adr, status.x[0]);
|
||||
sharp_send_cmd(map, CMD_CLEAR_STATUS, adr);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* $Id: block2mtd.c,v 1.29 2005/11/07 11:14:24 gleixner Exp $
|
||||
* $Id: block2mtd.c,v 1.30 2005/11/29 14:48:32 gleixner Exp $
|
||||
*
|
||||
* block2mtd.c - create an mtd from a block device
|
||||
*
|
||||
|
|
@ -19,7 +19,7 @@
|
|||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/buffer_head.h>
|
||||
|
||||
#define VERSION "$Revision: 1.29 $"
|
||||
#define VERSION "$Revision: 1.30 $"
|
||||
|
||||
|
||||
#define ERROR(fmt, args...) printk(KERN_ERR "block2mtd: " fmt "\n" , ## args)
|
||||
|
|
@ -40,7 +40,7 @@ static LIST_HEAD(blkmtd_device_list);
|
|||
|
||||
|
||||
#define PAGE_READAHEAD 64
|
||||
void cache_readahead(struct address_space *mapping, int index)
|
||||
static void cache_readahead(struct address_space *mapping, int index)
|
||||
{
|
||||
filler_t *filler = (filler_t*)mapping->a_ops->readpage;
|
||||
int i, pagei;
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* $Id: ms02-nv.c,v 1.10 2005/06/20 12:24:41 macro Exp $
|
||||
* $Id: ms02-nv.c,v 1.11 2005/11/14 13:41:47 macro Exp $
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
|
|
@ -293,13 +293,13 @@ static int __init ms02nv_init(void)
|
|||
|
||||
switch (mips_machtype) {
|
||||
case MACH_DS5000_200:
|
||||
csr = (volatile u32 *)KN02_CSR_BASE;
|
||||
csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);
|
||||
if (*csr & KN02_CSR_BNK32M)
|
||||
stride = 2;
|
||||
break;
|
||||
case MACH_DS5000_2X0:
|
||||
case MACH_DS5900:
|
||||
csr = (volatile u32 *)KN03_MCR_BASE;
|
||||
csr = (volatile u32 *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR);
|
||||
if (*csr & KN03_MCR_BNK32M)
|
||||
stride = 2;
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/* This version ported to the Linux-MTD system by dwmw2@infradead.org
|
||||
* $Id: ftl.c,v 1.58 2005/11/07 11:14:19 gleixner Exp $
|
||||
* $Id: ftl.c,v 1.59 2005/11/29 14:48:31 gleixner Exp $
|
||||
*
|
||||
* Fixes: Arnaldo Carvalho de Melo <acme@conectiva.com.br>
|
||||
* - fixes some leaks on failure in build_maps and ftl_notify_add, cleanups
|
||||
|
|
@ -1084,9 +1084,9 @@ struct mtd_blktrans_ops ftl_tr = {
|
|||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
int init_ftl(void)
|
||||
static int init_ftl(void)
|
||||
{
|
||||
DEBUG(0, "$Id: ftl.c,v 1.58 2005/11/07 11:14:19 gleixner Exp $\n");
|
||||
DEBUG(0, "$Id: ftl.c,v 1.59 2005/11/29 14:48:31 gleixner Exp $\n");
|
||||
|
||||
return register_mtd_blktrans(&ftl_tr);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -538,12 +538,6 @@ config MTD_MPC1211
|
|||
This enables access to the flash chips on the Interface MPC-1211(CTP/PCI/MPC-SH02).
|
||||
If you have such a board, say 'Y'.
|
||||
|
||||
config MTD_PQ2FADS
|
||||
tristate "JEDEC flash SIMM mapped on PQ2FADS and 8272ADS boards"
|
||||
depends on (ADS8272 || PQ2FADS) && MTD_PARTITIONS && MTD_JEDECPROBE && MTD_PHYSMAP && MTD_CFI_GEOMETRY && MTD_CFI_INTELEXT
|
||||
help
|
||||
This enables access to flash SIMM on PQ2FADS-like boards
|
||||
|
||||
config MTD_OMAP_NOR
|
||||
tristate "TI OMAP board mappings"
|
||||
depends on MTD_CFI && ARCH_OMAP
|
||||
|
|
|
|||
|
|
@ -70,6 +70,5 @@ obj-$(CONFIG_MTD_DMV182) += dmv182.o
|
|||
obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o
|
||||
obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
|
||||
obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
|
||||
obj-$(CONFIG_MTD_PQ2FADS) += pq2fads.o
|
||||
obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
|
||||
obj-$(CONFIG_MTD_TQM834x) += tqm834x.o
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* $Id: ixp4xx.c,v 1.12 2005/11/07 11:14:27 gleixner Exp $
|
||||
* $Id: ixp4xx.c,v 1.13 2005/11/16 16:23:21 dvrabel Exp $
|
||||
*
|
||||
* drivers/mtd/maps/ixp4xx.c
|
||||
*
|
||||
|
|
@ -34,10 +34,55 @@
|
|||
|
||||
#include <linux/reboot.h>
|
||||
|
||||
/*
|
||||
* Read/write a 16 bit word from flash address 'addr'.
|
||||
*
|
||||
* When the cpu is in little-endian mode it swizzles the address lines
|
||||
* ('address coherency') so we need to undo the swizzling to ensure commands
|
||||
* and the like end up on the correct flash address.
|
||||
*
|
||||
* To further complicate matters, due to the way the expansion bus controller
|
||||
* handles 32 bit reads, the byte stream ABCD is stored on the flash as:
|
||||
* D15 D0
|
||||
* +---+---+
|
||||
* | A | B | 0
|
||||
* +---+---+
|
||||
* | C | D | 2
|
||||
* +---+---+
|
||||
* This means that on LE systems each 16 bit word must be swapped. Note that
|
||||
* this requires CONFIG_MTD_CFI_BE_BYTE_SWAP to be enabled to 'unswap' the CFI
|
||||
* data and other flash commands which are always in D7-D0.
|
||||
*/
|
||||
#ifndef __ARMEB__
|
||||
#ifndef CONFIG_MTD_CFI_BE_BYTE_SWAP
|
||||
# error CONFIG_MTD_CFI_BE_BYTE_SWAP required
|
||||
#endif
|
||||
|
||||
static inline u16 flash_read16(void __iomem *addr)
|
||||
{
|
||||
return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2)));
|
||||
}
|
||||
|
||||
static inline void flash_write16(u16 d, void __iomem *addr)
|
||||
{
|
||||
__raw_writew(cpu_to_be16(d), (void __iomem *)((unsigned long)addr ^ 0x2));
|
||||
}
|
||||
|
||||
#define BYTE0(h) ((h) & 0xFF)
|
||||
#define BYTE1(h) (((h) >> 8) & 0xFF)
|
||||
|
||||
#else
|
||||
|
||||
static inline u16 flash_read16(const void __iomem *addr)
|
||||
{
|
||||
return __raw_readw(addr);
|
||||
}
|
||||
|
||||
static inline void flash_write16(u16 d, void __iomem *addr)
|
||||
{
|
||||
__raw_writew(d, addr);
|
||||
}
|
||||
|
||||
#define BYTE0(h) (((h) >> 8) & 0xFF)
|
||||
#define BYTE1(h) ((h) & 0xFF)
|
||||
#endif
|
||||
|
|
@ -45,7 +90,7 @@
|
|||
static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
|
||||
{
|
||||
map_word val;
|
||||
val.x[0] = le16_to_cpu(readw(map->virt + ofs));
|
||||
val.x[0] = flash_read16(map->virt + ofs);
|
||||
return val;
|
||||
}
|
||||
|
||||
|
|
@ -57,19 +102,28 @@ static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
|
|||
static void ixp4xx_copy_from(struct map_info *map, void *to,
|
||||
unsigned long from, ssize_t len)
|
||||
{
|
||||
int i;
|
||||
u8 *dest = (u8 *) to;
|
||||
void __iomem *src = map->virt + from;
|
||||
u16 data;
|
||||
|
||||
for (i = 0; i < (len / 2); i++) {
|
||||
data = le16_to_cpu(readw(src + 2*i));
|
||||
dest[i * 2] = BYTE0(data);
|
||||
dest[i * 2 + 1] = BYTE1(data);
|
||||
if (len <= 0)
|
||||
return;
|
||||
|
||||
if (from & 1) {
|
||||
*dest++ = BYTE1(flash_read16(src));
|
||||
src++;
|
||||
--len;
|
||||
}
|
||||
|
||||
if (len & 1)
|
||||
dest[len - 1] = BYTE0(le16_to_cpu(readw(src + 2*i)));
|
||||
while (len >= 2) {
|
||||
u16 data = flash_read16(src);
|
||||
*dest++ = BYTE0(data);
|
||||
*dest++ = BYTE1(data);
|
||||
src += 2;
|
||||
len -= 2;
|
||||
}
|
||||
|
||||
if (len > 0)
|
||||
*dest++ = BYTE0(flash_read16(src));
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -79,7 +133,7 @@ static void ixp4xx_copy_from(struct map_info *map, void *to,
|
|||
static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long adr)
|
||||
{
|
||||
if (!(adr & 1))
|
||||
writew(cpu_to_le16(d.x[0]), map->virt + adr);
|
||||
flash_write16(d.x[0], map->virt + adr);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -87,7 +141,7 @@ static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long
|
|||
*/
|
||||
static void ixp4xx_write16(struct map_info *map, map_word d, unsigned long adr)
|
||||
{
|
||||
writew(cpu_to_le16(d.x[0]), map->virt + adr);
|
||||
flash_write16(d.x[0], map->virt + adr);
|
||||
}
|
||||
|
||||
struct ixp4xx_flash_info {
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
* (C) Copyright 2000-2001, Greg Ungerer (gerg@snapgear.com)
|
||||
* (C) Copyright 2001-2002, SnapGear (www.snapgear.com)
|
||||
*
|
||||
* $Id: nettel.c,v 1.11 2005/11/07 11:14:27 gleixner Exp $
|
||||
* $Id: nettel.c,v 1.12 2005/11/29 14:30:00 gleixner Exp $
|
||||
*/
|
||||
|
||||
/****************************************************************************/
|
||||
|
|
@ -479,7 +479,7 @@ void __exit nettel_cleanup(void)
|
|||
}
|
||||
if (nettel_intel_map.virt) {
|
||||
iounmap(nettel_intel_map.virt);
|
||||
nettel_intel_map.virt = 0;
|
||||
nettel_intel_map.virt = NULL;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* $Id: pci.c,v 1.13 2005/11/07 11:14:27 gleixner Exp $
|
||||
* $Id: pci.c,v 1.14 2005/11/17 08:20:27 dwmw2 Exp $
|
||||
*
|
||||
* Generic PCI memory map driver. We support the following boards:
|
||||
* - Intel IQ80310 ATU.
|
||||
|
|
@ -102,7 +102,7 @@ static void mtd_pci_copyto(struct map_info *_map, unsigned long to, const void *
|
|||
memcpy_toio(map->base + map->translate(map, to), from, len);
|
||||
}
|
||||
|
||||
static struct map_info mtd_pci_map = {
|
||||
static const struct map_info mtd_pci_map = {
|
||||
.phys = NO_XIP,
|
||||
.copy_from = mtd_pci_copyfrom,
|
||||
.copy_to = mtd_pci_copyto,
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* $Id: physmap.c,v 1.38 2005/11/07 11:14:28 gleixner Exp $
|
||||
* $Id: physmap.c,v 1.39 2005/11/29 14:49:36 gleixner Exp $
|
||||
*
|
||||
* Normal mappings of chips in physical memory
|
||||
*
|
||||
|
|
@ -19,6 +19,7 @@
|
|||
#include <linux/mtd/map.h>
|
||||
#include <linux/config.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
||||
static struct mtd_info *mymtd;
|
||||
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
||||
*
|
||||
* $Id: sc520cdp.c,v 1.22 2005/11/07 11:14:28 gleixner Exp $
|
||||
* $Id: sc520cdp.c,v 1.23 2005/11/17 08:20:27 dwmw2 Exp $
|
||||
*
|
||||
*
|
||||
* The SC520CDP is an evaluation board for the Elan SC520 processor available
|
||||
|
|
@ -164,7 +164,7 @@ struct sc520_par_table
|
|||
unsigned long default_address;
|
||||
};
|
||||
|
||||
static struct sc520_par_table par_table[NUM_FLASH_BANKS] =
|
||||
static const struct sc520_par_table par_table[NUM_FLASH_BANKS] =
|
||||
{
|
||||
{ /* Flash Bank #0: selected by ROMCS0 */
|
||||
SC520_PAR_ROMCS0,
|
||||
|
|
|
|||
|
|
@ -1486,7 +1486,7 @@ ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
|
|||
/*
|
||||
* Module initialization function
|
||||
*/
|
||||
int __init ns_init_module(void)
|
||||
static int __init ns_init_module(void)
|
||||
{
|
||||
struct nand_chip *chip;
|
||||
struct nandsim *nand;
|
||||
|
|
|
|||
|
|
@ -30,11 +30,9 @@ MODULE_PARM_DESC(block_size, "Block size to use by RFD, defaults to erase unit s
|
|||
|
||||
#define PREFIX "rfd_ftl: "
|
||||
|
||||
/* Major device # for FTL device */
|
||||
|
||||
/* A request for this major has been sent to device@lanana.org */
|
||||
/* This major has been assigned by device@lanana.org */
|
||||
#ifndef RFD_FTL_MAJOR
|
||||
#define RFD_FTL_MAJOR 95
|
||||
#define RFD_FTL_MAJOR 256
|
||||
#endif
|
||||
|
||||
/* Maximum number of partitions in an FTL region */
|
||||
|
|
|
|||
|
|
@ -234,6 +234,7 @@ void jffs2_read_inode (struct inode *inode)
|
|||
c = JFFS2_SB_INFO(inode->i_sb);
|
||||
|
||||
jffs2_init_inode_info(f);
|
||||
down(&f->sem);
|
||||
|
||||
ret = jffs2_do_read_inode(c, f, inode->i_ino, &latest_node);
|
||||
|
||||
|
|
@ -400,6 +401,7 @@ struct inode *jffs2_new_inode (struct inode *dir_i, int mode, struct jffs2_raw_i
|
|||
|
||||
f = JFFS2_INODE_INFO(inode);
|
||||
jffs2_init_inode_info(f);
|
||||
down(&f->sem);
|
||||
|
||||
memset(ri, 0, sizeof(*ri));
|
||||
/* Set OS-specific defaults for new inodes */
|
||||
|
|
|
|||
|
|
@ -51,7 +51,7 @@ static void jffs2_i_init_once(void * foo, kmem_cache_t * cachep, unsigned long f
|
|||
|
||||
if ((flags & (SLAB_CTOR_VERIFY|SLAB_CTOR_CONSTRUCTOR)) ==
|
||||
SLAB_CTOR_CONSTRUCTOR) {
|
||||
init_MUTEX_LOCKED(&ei->sem);
|
||||
init_MUTEX(&ei->sem);
|
||||
inode_init_once(&ei->vfs_inode);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
|
||||
/* Common Flash Interface structures
|
||||
* See http://support.intel.com/design/flash/technote/index.htm
|
||||
* $Id: cfi.h,v 1.56 2005/11/07 11:14:54 gleixner Exp $
|
||||
* $Id: cfi.h,v 1.57 2005/11/15 23:28:17 tpoynor Exp $
|
||||
*/
|
||||
|
||||
#ifndef __MTD_CFI_H__
|
||||
|
|
@ -426,6 +426,22 @@ static inline uint8_t cfi_read_query(struct map_info *map, uint32_t addr)
|
|||
}
|
||||
}
|
||||
|
||||
static inline uint16_t cfi_read_query16(struct map_info *map, uint32_t addr)
|
||||
{
|
||||
map_word val = map_read(map, addr);
|
||||
|
||||
if (map_bankwidth_is_1(map)) {
|
||||
return val.x[0] & 0xff;
|
||||
} else if (map_bankwidth_is_2(map)) {
|
||||
return cfi16_to_cpu(val.x[0]);
|
||||
} else {
|
||||
/* No point in a 64-bit byteswap since that would just be
|
||||
swapping the responses from different chips, and we are
|
||||
only interested in one chip (a representative sample) */
|
||||
return cfi32_to_cpu(val.x[0]);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void cfi_udelay(int us)
|
||||
{
|
||||
if (us >= 1000) {
|
||||
|
|
|
|||
Loading…
Reference in New Issue