[ARM] 4822/1: RealView: Change the REALVIEW_MPCORE configuration option
This patch changes the REALVIEW_MPCORE configuration option to REALVIEW_EB_ARM11MP since this is only specific to RealView/EB. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -611,7 +611,7 @@ source "kernel/time/Kconfig"
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config SMP
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bool "Symmetric Multi-Processing (EXPERIMENTAL)"
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depends on EXPERIMENTAL && REALVIEW_MPCORE
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depends on EXPERIMENTAL && REALVIEW_EB_ARM11MP
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help
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This enables support for systems with more than one CPU. If you have
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a system with only one CPU, like most personal computers, say N. If
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@ -645,7 +645,7 @@ config HOTPLUG_CPU
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config LOCAL_TIMERS
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bool "Use local timer interrupts"
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depends on SMP && REALVIEW_MPCORE
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depends on SMP && REALVIEW_EB_ARM11MP
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default y
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help
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Enable support for local timers on SMP platforms, rather then the
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@ -7,24 +7,21 @@ config MACH_REALVIEW_EB
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help
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Include support for the ARM(R) RealView Emulation Baseboard platform.
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config REALVIEW_MPCORE
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bool "Support MPcore tile"
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config REALVIEW_EB_ARM11MP
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bool "Support ARM11MPCore tile"
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depends on MACH_REALVIEW_EB
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select CACHE_L2X0
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help
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Enable support for the MPCore tile on the Realview platform.
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Since there are device address and interrupt differences, a
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kernel built with this option enabled is not compatible with
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other tiles.
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Enable support for the ARM11MPCore tile on the Realview platform.
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config REALVIEW_MPCORE_REVB
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bool "Support MPcore RevB tile"
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depends on REALVIEW_MPCORE
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config REALVIEW_EB_ARM11MP_REVB
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bool "Support ARM11MPCore RevB tile"
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depends on REALVIEW_EB_ARM11MP
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default n
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help
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Enable support for the MPCore RevB tile on the Realview platform.
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Since there are device address differences, a
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Enable support for the ARM11MPCore RevB tile on the Realview
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platform. Since there are device address differences, a
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kernel built with this option enabled is not compatible with
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other tiles.
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other revisions of the ARM11MPCore tile.
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endmenu
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@ -261,7 +261,7 @@ static void __init gic_init_irq(void)
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gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
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gic_cpu_init(0, gic_cpu_base_addr);
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#ifndef CONFIG_REALVIEW_MPCORE_REVB
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#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
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/* board GIC, secondary */
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gic_dist_init(1, __io_address(REALVIEW_GIC_DIST_BASE), 64);
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gic_cpu_init(1, __io_address(REALVIEW_GIC_CPU_BASE));
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@ -26,7 +26,7 @@
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/*
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* RealView EB + ARM11MPCore peripheral addresses
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*/
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#ifdef CONFIG_REALVIEW_MPCORE_REVB
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#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
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#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
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#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
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#define REALVIEW_EB11MP_TWD_BASE 0x10100700
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@ -143,7 +143,7 @@
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#define NR_IRQS NR_IRQS_EB
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#endif
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#if defined(CONFIG_REALVIEW_MPCORE) \
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#if defined(CONFIG_REALVIEW_EB_ARM11MP) \
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&& (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
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#undef MAX_GIC_NR
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#define MAX_GIC_NR NR_GIC_EB11MP
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@ -162,7 +162,7 @@
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((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
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== proc_type)
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#ifdef CONFIG_REALVIEW_MPCORE
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#ifdef CONFIG_REALVIEW_EB_ARM11MP
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#define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP)
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#else
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#define core_tile_eb11mp() 0
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