mtd: spi-nor: Use the spi_mem_xx() API
The spi_mem_xxx() API has been introduced to replace the spi_flash_read() one. Make use of it so we can get rid of spi_flash_read(). Note that using spi_mem_xx() also simplifies the code because this API takes care of using the regular spi_sync() interface when the optimized ->mem_ops interface is not implemented by the controller. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@exceet.de> Tested-by: Frieder Schrempf <frieder.schrempf@exceet.de> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Boris Brezillon
Mark Brown
parent
b95cb394ab
commit
4120f8d158
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@ -81,6 +81,7 @@ config MTD_DATAFLASH_OTP
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config MTD_M25P80
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tristate "Support most SPI Flash chips (AT26DF, M25P, W25X, ...)"
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depends on SPI_MASTER && MTD_SPI_NOR
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select SPI_MEM
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help
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This enables access to most modern SPI flash chips, used for
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program and data storage. Series supported include Atmel AT26DF,
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@ -24,12 +24,13 @@
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi-mem.h>
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#include <linux/spi/flash.h>
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#include <linux/mtd/spi-nor.h>
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#define MAX_CMD_SIZE 6
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struct m25p {
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struct spi_device *spi;
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struct spi_mem *spimem;
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struct spi_nor spi_nor;
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u8 command[MAX_CMD_SIZE];
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};
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@ -37,97 +38,68 @@ struct m25p {
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static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
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{
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struct m25p *flash = nor->priv;
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struct spi_device *spi = flash->spi;
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struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(code, 1),
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SPI_MEM_OP_NO_ADDR,
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SPI_MEM_OP_NO_DUMMY,
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SPI_MEM_OP_DATA_IN(len, val, 1));
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int ret;
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ret = spi_write_then_read(spi, &code, 1, val, len);
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ret = spi_mem_exec_op(flash->spimem, &op);
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if (ret < 0)
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dev_err(&spi->dev, "error %d reading %x\n", ret, code);
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dev_err(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
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code);
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return ret;
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}
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static void m25p_addr2cmd(struct spi_nor *nor, unsigned int addr, u8 *cmd)
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{
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/* opcode is in cmd[0] */
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cmd[1] = addr >> (nor->addr_width * 8 - 8);
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cmd[2] = addr >> (nor->addr_width * 8 - 16);
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cmd[3] = addr >> (nor->addr_width * 8 - 24);
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cmd[4] = addr >> (nor->addr_width * 8 - 32);
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}
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static int m25p_cmdsz(struct spi_nor *nor)
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{
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return 1 + nor->addr_width;
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}
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static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
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{
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struct m25p *flash = nor->priv;
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struct spi_device *spi = flash->spi;
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struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 1),
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SPI_MEM_OP_NO_ADDR,
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SPI_MEM_OP_NO_DUMMY,
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SPI_MEM_OP_DATA_OUT(len, buf, 1));
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flash->command[0] = opcode;
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if (buf)
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memcpy(&flash->command[1], buf, len);
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return spi_write(spi, flash->command, len + 1);
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return spi_mem_exec_op(flash->spimem, &op);
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}
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static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
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const u_char *buf)
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{
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struct m25p *flash = nor->priv;
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struct spi_device *spi = flash->spi;
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unsigned int inst_nbits, addr_nbits, data_nbits, data_idx;
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struct spi_transfer t[3] = {};
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struct spi_message m;
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int cmd_sz = m25p_cmdsz(nor);
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ssize_t ret;
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struct spi_mem_op op =
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SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 1),
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SPI_MEM_OP_ADDR(nor->addr_width, to, 1),
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SPI_MEM_OP_DUMMY(0, 1),
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SPI_MEM_OP_DATA_OUT(len, buf, 1));
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size_t remaining = len;
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int ret;
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/* get transfer protocols. */
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inst_nbits = spi_nor_get_protocol_inst_nbits(nor->write_proto);
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addr_nbits = spi_nor_get_protocol_addr_nbits(nor->write_proto);
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data_nbits = spi_nor_get_protocol_data_nbits(nor->write_proto);
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spi_message_init(&m);
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op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->write_proto);
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op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->write_proto);
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op.dummy.buswidth = op.addr.buswidth;
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op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto);
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if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
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cmd_sz = 1;
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op.addr.nbytes = 0;
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flash->command[0] = nor->program_opcode;
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m25p_addr2cmd(nor, to, flash->command);
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t[0].tx_buf = flash->command;
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t[0].tx_nbits = inst_nbits;
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t[0].len = cmd_sz;
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spi_message_add_tail(&t[0], &m);
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/* split the op code and address bytes into two transfers if needed. */
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data_idx = 1;
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if (addr_nbits != inst_nbits) {
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t[0].len = 1;
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t[1].tx_buf = &flash->command[1];
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t[1].tx_nbits = addr_nbits;
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t[1].len = cmd_sz - 1;
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spi_message_add_tail(&t[1], &m);
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data_idx = 2;
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}
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t[data_idx].tx_buf = buf;
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t[data_idx].tx_nbits = data_nbits;
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t[data_idx].len = len;
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spi_message_add_tail(&t[data_idx], &m);
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ret = spi_sync(spi, &m);
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while (remaining) {
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op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
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ret = spi_mem_adjust_op_size(flash->spimem, &op);
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if (ret)
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return ret;
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ret = m.actual_length - cmd_sz;
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if (ret < 0)
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return -EIO;
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ret = spi_mem_exec_op(flash->spimem, &op);
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if (ret)
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return ret;
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op.addr.val += op.data.nbytes;
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remaining -= op.data.nbytes;
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op.data.buf.out += op.data.nbytes;
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}
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return len;
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}
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/*
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@ -138,92 +110,39 @@ static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
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u_char *buf)
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{
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struct m25p *flash = nor->priv;
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struct spi_device *spi = flash->spi;
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unsigned int inst_nbits, addr_nbits, data_nbits, data_idx;
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struct spi_transfer t[3];
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struct spi_message m;
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unsigned int dummy = nor->read_dummy;
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ssize_t ret;
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int cmd_sz;
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struct spi_mem_op op =
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SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
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SPI_MEM_OP_ADDR(nor->addr_width, from, 1),
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SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
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SPI_MEM_OP_DATA_IN(len, buf, 1));
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size_t remaining = len;
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int ret;
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/* get transfer protocols. */
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inst_nbits = spi_nor_get_protocol_inst_nbits(nor->read_proto);
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addr_nbits = spi_nor_get_protocol_addr_nbits(nor->read_proto);
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data_nbits = spi_nor_get_protocol_data_nbits(nor->read_proto);
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op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto);
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op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
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op.dummy.buswidth = op.addr.buswidth;
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op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto);
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/* convert the dummy cycles to the number of bytes */
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dummy = (dummy * addr_nbits) / 8;
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op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
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if (spi_flash_read_supported(spi)) {
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struct spi_flash_read_message msg;
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memset(&msg, 0, sizeof(msg));
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msg.buf = buf;
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msg.from = from;
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msg.len = len;
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msg.read_opcode = nor->read_opcode;
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msg.addr_width = nor->addr_width;
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msg.dummy_bytes = dummy;
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msg.opcode_nbits = inst_nbits;
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msg.addr_nbits = addr_nbits;
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msg.data_nbits = data_nbits;
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ret = spi_flash_read(spi, &msg);
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if (ret < 0)
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return ret;
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return msg.retlen;
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}
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spi_message_init(&m);
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memset(t, 0, (sizeof t));
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flash->command[0] = nor->read_opcode;
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m25p_addr2cmd(nor, from, flash->command);
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t[0].tx_buf = flash->command;
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t[0].tx_nbits = inst_nbits;
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t[0].len = m25p_cmdsz(nor) + dummy;
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spi_message_add_tail(&t[0], &m);
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/*
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* Set all dummy/mode cycle bits to avoid sending some manufacturer
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* specific pattern, which might make the memory enter its Continuous
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* Read mode by mistake.
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* Based on the different mode cycle bit patterns listed and described
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* in the JESD216B specification, the 0xff value works for all memories
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* and all manufacturers.
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*/
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cmd_sz = t[0].len;
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memset(flash->command + cmd_sz - dummy, 0xff, dummy);
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/* split the op code and address bytes into two transfers if needed. */
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data_idx = 1;
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if (addr_nbits != inst_nbits) {
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t[0].len = 1;
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t[1].tx_buf = &flash->command[1];
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t[1].tx_nbits = addr_nbits;
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t[1].len = cmd_sz - 1;
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spi_message_add_tail(&t[1], &m);
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data_idx = 2;
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}
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t[data_idx].rx_buf = buf;
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t[data_idx].rx_nbits = data_nbits;
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t[data_idx].len = min3(len, spi_max_transfer_size(spi),
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spi_max_message_size(spi) - cmd_sz);
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spi_message_add_tail(&t[data_idx], &m);
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ret = spi_sync(spi, &m);
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while (remaining) {
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op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
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ret = spi_mem_adjust_op_size(flash->spimem, &op);
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if (ret)
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return ret;
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ret = m.actual_length - cmd_sz;
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if (ret < 0)
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return -EIO;
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ret = spi_mem_exec_op(flash->spimem, &op);
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if (ret)
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return ret;
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op.addr.val += op.data.nbytes;
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remaining -= op.data.nbytes;
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op.data.buf.in += op.data.nbytes;
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}
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return len;
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}
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/*
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@ -231,8 +150,9 @@ static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
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* matches what the READ command supports, at least until this driver
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* understands FAST_READ (for clocks over 25 MHz).
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*/
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static int m25p_probe(struct spi_device *spi)
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static int m25p_probe(struct spi_mem *spimem)
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{
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struct spi_device *spi = spimem->spi;
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struct flash_platform_data *data;
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struct m25p *flash;
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struct spi_nor *nor;
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@ -244,9 +164,9 @@ static int m25p_probe(struct spi_device *spi)
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char *flash_name;
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int ret;
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data = dev_get_platdata(&spi->dev);
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data = dev_get_platdata(&spimem->spi->dev);
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flash = devm_kzalloc(&spi->dev, sizeof(*flash), GFP_KERNEL);
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flash = devm_kzalloc(&spimem->spi->dev, sizeof(*flash), GFP_KERNEL);
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if (!flash)
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return -ENOMEM;
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@ -258,12 +178,12 @@ static int m25p_probe(struct spi_device *spi)
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nor->write_reg = m25p80_write_reg;
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nor->read_reg = m25p80_read_reg;
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nor->dev = &spi->dev;
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nor->dev = &spimem->spi->dev;
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spi_nor_set_flash_node(nor, spi->dev.of_node);
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nor->priv = flash;
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spi_set_drvdata(spi, flash);
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flash->spi = spi;
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flash->spimem = spimem;
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if (spi->mode & SPI_RX_QUAD) {
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hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
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@ -303,9 +223,9 @@ static int m25p_probe(struct spi_device *spi)
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}
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static int m25p_remove(struct spi_device *spi)
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static int m25p_remove(struct spi_mem *spimem)
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{
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struct m25p *flash = spi_get_drvdata(spi);
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struct m25p *flash = spi_mem_get_drvdata(spimem);
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spi_nor_restore(&flash->spi_nor);
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@ -313,9 +233,9 @@ static int m25p_remove(struct spi_device *spi)
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return mtd_device_unregister(&flash->spi_nor.mtd);
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}
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static void m25p_shutdown(struct spi_device *spi)
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static void m25p_shutdown(struct spi_mem *spimem)
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{
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struct m25p *flash = spi_get_drvdata(spi);
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struct m25p *flash = spi_mem_get_drvdata(spimem);
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spi_nor_restore(&flash->spi_nor);
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}
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@ -386,12 +306,14 @@ static const struct of_device_id m25p_of_table[] = {
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};
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MODULE_DEVICE_TABLE(of, m25p_of_table);
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static struct spi_driver m25p80_driver = {
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static struct spi_mem_driver m25p80_driver = {
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.spidrv = {
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.driver = {
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.name = "m25p80",
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.of_match_table = m25p_of_table,
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},
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.id_table = m25p_ids,
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},
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.probe = m25p_probe,
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.remove = m25p_remove,
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.shutdown = m25p_shutdown,
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@ -402,7 +324,7 @@ static struct spi_driver m25p80_driver = {
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*/
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};
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module_spi_driver(m25p80_driver);
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module_spi_mem_driver(m25p80_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Mike Lavender");
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