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drm/radeon/kms: Add crtc tiling setup support for r6xx/r7xx 

Needed for scanning out of a tiled buffer.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Alex Deucher 2010-05-20 12:04:59 -04:00 committed by Dave Airlie
parent 21a8122ad3
commit 40c4ac1c19
2 changed files with 16 additions and 4 deletions
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15
drivers/gpu/drm/radeon/atombios_crtc.c
View File

@ -1000,11 +1000,18 @@ static int avivo_crtc_set_base(struct drm_crtc *crtc, int x, int y,
return -EINVAL; return -EINVAL;
} }
if (tiling_flags & RADEON_TILING_MACRO) if (rdev->family >= CHIP_R600) {
fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE; if (tiling_flags & RADEON_TILING_MACRO)
fb_format |= R600_D1GRPH_ARRAY_MODE_2D_TILED_THIN1;
else if (tiling_flags & RADEON_TILING_MICRO)
fb_format |= R600_D1GRPH_ARRAY_MODE_1D_TILED_THIN1;
} else {
if (tiling_flags & RADEON_TILING_MACRO)
fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE;
if (tiling_flags & RADEON_TILING_MICRO) if (tiling_flags & RADEON_TILING_MICRO)
fb_format |= AVIVO_D1GRPH_TILED; fb_format |= AVIVO_D1GRPH_TILED;
}
if (radeon_crtc->crtc_id == 0) if (radeon_crtc->crtc_id == 0)
WREG32(AVIVO_D1VGA_CONTROL, 0); WREG32(AVIVO_D1VGA_CONTROL, 0);

5
drivers/gpu/drm/radeon/r500_reg.h
View File

@ -386,6 +386,11 @@
# define AVIVO_D1GRPH_TILED (1 << 20) # define AVIVO_D1GRPH_TILED (1 << 20)
# define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21) # define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21)
# define R600_D1GRPH_ARRAY_MODE_LINEAR_GENERAL (0 << 20)
# define R600_D1GRPH_ARRAY_MODE_LINEAR_ALIGNED (1 << 20)
# define R600_D1GRPH_ARRAY_MODE_1D_TILED_THIN1 (2 << 20)
# define R600_D1GRPH_ARRAY_MODE_2D_TILED_THIN1 (4 << 20)
/* The R7xx *_HIGH surface regs are backwards; the D1 regs are in the D2 /* The R7xx *_HIGH surface regs are backwards; the D1 regs are in the D2
* block and vice versa. This applies to GRPH, CUR, etc. * block and vice versa. This applies to GRPH, CUR, etc.
*/ */