hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Revert "ARM: shmobile: emev2: Replace modify_scu_cpu_psr with scu_power_mode" 

This reverts commit 865d90f803.

The code changes the flags of the wrong cpus - which breaks the whole
bootup of secondary CPUs.

Cc: Bastian Hecht <hechtb@gmail.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
This commit is contained in:
Simon Horman 2012-11-13 11:41:09 +09:00
parent d5b689089d
commit 40937f7460
1 changed files with 20 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
arch/arm/mach-shmobile/smp-emev2.c
View File

@ -32,8 +32,24 @@
#define EMEV2_SCU_BASE 0x1e000000 #define EMEV2_SCU_BASE 0x1e000000
static DEFINE_SPINLOCK(scu_lock);
static void __iomem *scu_base; static void __iomem *scu_base;
static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
{
unsigned long tmp;
/* we assume this code is running on a different cpu
* than the one that is changing coherency setting */
spin_lock(&scu_lock);
tmp = readl(scu_base + 8);
tmp &= ~clr;
tmp |= set;
writel(tmp, scu_base + 8);
spin_unlock(&scu_lock);
}
static unsigned int __init emev2_get_core_count(void) static unsigned int __init emev2_get_core_count(void)
{ {
if (!scu_base) { if (!scu_base) {
@ -79,7 +95,7 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *
cpu = cpu_logical_map(cpu); cpu = cpu_logical_map(cpu);
/* enable cache coherency */ /* enable cache coherency */
scu_power_mode(scu_base, 0); modify_scu_cpu_psr(0, 3 << (cpu * 8));
/* Tell ROM loader about our vector (in headsmp.S) */ /* Tell ROM loader about our vector (in headsmp.S) */
emev2_set_boot_vector(__pa(shmobile_secondary_vector)); emev2_set_boot_vector(__pa(shmobile_secondary_vector));
@ -90,10 +106,12 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *
static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
{ {
int cpu = cpu_logical_map(0);
scu_enable(scu_base); scu_enable(scu_base);
/* enable cache coherency on CPU0 */ /* enable cache coherency on CPU0 */
scu_power_mode(scu_base, 0); modify_scu_cpu_psr(0, 3 << (cpu * 8));
} }
static void __init emev2_smp_init_cpus(void) static void __init emev2_smp_init_cpus(void)