Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: amd64_edac: misc small cleanups amd64_edac: fix ecc_enable_override handling amd64_edac: check only ECC bit in amd64_determine_edac_cap
This commit is contained in:
commit
4075ea8c54
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@ -754,13 +754,13 @@ static void amd64_cpu_display_info(struct amd64_pvt *pvt)
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static enum edac_type amd64_determine_edac_cap(struct amd64_pvt *pvt)
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static enum edac_type amd64_determine_edac_cap(struct amd64_pvt *pvt)
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{
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{
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int bit;
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int bit;
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enum dev_type edac_cap = EDAC_NONE;
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enum dev_type edac_cap = EDAC_FLAG_NONE;
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bit = (boot_cpu_data.x86 > 0xf || pvt->ext_model >= OPTERON_CPU_REV_F)
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bit = (boot_cpu_data.x86 > 0xf || pvt->ext_model >= OPTERON_CPU_REV_F)
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? 19
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? 19
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: 17;
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: 17;
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if (pvt->dclr0 >> BIT(bit))
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if (pvt->dclr0 & BIT(bit))
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edac_cap = EDAC_FLAG_SECDED;
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edac_cap = EDAC_FLAG_SECDED;
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return edac_cap;
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return edac_cap;
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@ -1269,7 +1269,7 @@ static int f10_early_channel_count(struct amd64_pvt *pvt)
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if (channels == 0)
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if (channels == 0)
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channels = 1;
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channels = 1;
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debugf0("DIMM count= %d\n", channels);
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debugf0("MCT channel count: %d\n", channels);
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return channels;
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return channels;
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@ -2966,7 +2966,12 @@ static int amd64_check_ecc_enabled(struct amd64_pvt *pvt)
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" Use of the override can cause "
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" Use of the override can cause "
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"unknown side effects.\n");
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"unknown side effects.\n");
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ret = -ENODEV;
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ret = -ENODEV;
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}
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} else
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/*
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* enable further driver loading if ECC enable is
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* overridden.
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*/
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ret = 0;
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} else {
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} else {
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amd64_printk(KERN_INFO,
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amd64_printk(KERN_INFO,
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"ECC is enabled by BIOS, Proceeding "
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"ECC is enabled by BIOS, Proceeding "
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@ -3006,7 +3011,6 @@ static void amd64_setup_mci_misc_attributes(struct mem_ctl_info *mci)
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mci->mtype_cap = MEM_FLAG_DDR2 | MEM_FLAG_RDDR2;
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mci->mtype_cap = MEM_FLAG_DDR2 | MEM_FLAG_RDDR2;
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mci->edac_ctl_cap = EDAC_FLAG_NONE;
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mci->edac_ctl_cap = EDAC_FLAG_NONE;
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mci->edac_cap = EDAC_FLAG_NONE;
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if (pvt->nbcap & K8_NBCAP_SECDED)
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if (pvt->nbcap & K8_NBCAP_SECDED)
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mci->edac_ctl_cap |= EDAC_FLAG_SECDED;
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mci->edac_ctl_cap |= EDAC_FLAG_SECDED;
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@ -3052,7 +3056,7 @@ static int amd64_probe_one_instance(struct pci_dev *dram_f2_ctl,
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if (!pvt)
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if (!pvt)
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goto err_exit;
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goto err_exit;
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pvt->mc_node_id = get_mc_node_id_from_pdev(dram_f2_ctl);
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pvt->mc_node_id = get_node_id(dram_f2_ctl);
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pvt->dram_f2_ctl = dram_f2_ctl;
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pvt->dram_f2_ctl = dram_f2_ctl;
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pvt->ext_model = boot_cpu_data.x86_model >> 4;
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pvt->ext_model = boot_cpu_data.x86_model >> 4;
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@ -3179,8 +3183,7 @@ static int __devinit amd64_init_one_instance(struct pci_dev *pdev,
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{
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{
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int ret = 0;
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int ret = 0;
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debugf0("(MC node=%d,mc_type='%s')\n",
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debugf0("(MC node=%d,mc_type='%s')\n", get_node_id(pdev),
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get_mc_node_id_from_pdev(pdev),
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get_amd_family_name(mc_type->driver_data));
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get_amd_family_name(mc_type->driver_data));
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ret = pci_enable_device(pdev);
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ret = pci_enable_device(pdev);
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@ -3319,15 +3322,17 @@ static int __init amd64_edac_init(void)
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err = amd64_init_2nd_stage(pvt_lookup[nb]);
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err = amd64_init_2nd_stage(pvt_lookup[nb]);
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if (err)
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if (err)
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goto err_exit;
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goto err_2nd_stage;
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}
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}
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amd64_setup_pci_device();
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amd64_setup_pci_device();
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return 0;
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return 0;
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err_2nd_stage:
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debugf0("2nd stage failed\n");
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err_exit:
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err_exit:
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debugf0("'finish_setup' stage failed\n");
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pci_unregister_driver(&amd64_pci_driver);
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pci_unregister_driver(&amd64_pci_driver);
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return err;
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return err;
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@ -444,7 +444,7 @@ enum {
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#define K8_MSR_MC4ADDR 0x0412
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#define K8_MSR_MC4ADDR 0x0412
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/* AMD sets the first MC device at device ID 0x18. */
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/* AMD sets the first MC device at device ID 0x18. */
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static inline int get_mc_node_id_from_pdev(struct pci_dev *pdev)
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static inline int get_node_id(struct pci_dev *pdev)
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{
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{
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return PCI_SLOT(pdev->devfn) - 0x18;
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return PCI_SLOT(pdev->devfn) - 0x18;
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}
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}
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