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avr32: re-instate MCI WP/CD pin assignments for ATNGW100 

The MRMT1 patch mistakenly reverted commit
fe272b5bd1.

This new patch is intended to correct this, so that both daughtercards
should be able to assign GPIO PC25 and PE0 to the MCI driver.

Signed-off-by: Peter Ma <pma@mediamatech.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This commit is contained in:
Peter Ma 2009-08-24 14:13:29 -07:00 committed by Haavard Skinnemoen
parent 1e23502cc5
commit 3fe6ad6c39
1 changed files with 0 additions and 5 deletions
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5
arch/avr32/boards/atngw100/setup.c
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@ -56,13 +56,8 @@ static struct spi_board_info spi0_board_info[] __initdata = {
static struct mci_platform_data __initdata mci0_data = {
.slot[0] = {
.bus_width = 4,
#if defined(CONFIG_BOARD_ATNGW100_EVKLCD10X) || defined(CONFIG_BOARD_ATNGW100_MRMT1)
.detect_pin = GPIO_PIN_NONE,
.wp_pin = GPIO_PIN_NONE,
#else
.detect_pin = GPIO_PIN_PC(25),
.wp_pin = GPIO_PIN_PE(0),
#endif
},
};