[POWERPC] implement BEGIN/END_FW_FTR_SECTION
and use it an all the obvious places in assembler code. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
This commit is contained in:
parent
fc246c389d
commit
3f639ee8c5
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@ -27,10 +27,7 @@
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#include <asm/ppc_asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/cputable.h>
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#ifdef CONFIG_PPC_ISERIES
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#define DO_SOFT_DISABLE
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#endif
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#include <asm/firmware.h>
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/*
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* System calls.
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@ -91,6 +88,7 @@ system_call_common:
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ld r11,exception_marker@toc(r2)
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std r11,-16(r9) /* "regshere" marker */
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#ifdef CONFIG_PPC_ISERIES
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BEGIN_FW_FTR_SECTION
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/* Hack for handling interrupts when soft-enabling on iSeries */
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cmpdi cr1,r0,0x5555 /* syscall 0x5555 */
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andi. r10,r12,MSR_PR /* from kernel */
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@ -98,6 +96,7 @@ system_call_common:
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beq hardware_interrupt_entry
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lbz r10,PACAPROCENABLED(r13)
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std r10,SOFTE(r1)
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
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#endif
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mfmsr r11
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ori r11,r11,MSR_EE
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@ -462,6 +461,7 @@ _GLOBAL(ret_from_except_lite)
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restore:
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#ifdef CONFIG_PPC_ISERIES
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BEGIN_FW_FTR_SECTION
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ld r5,SOFTE(r1)
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cmpdi 0,r5,0
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beq 4f
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@ -480,6 +480,7 @@ restore:
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b .ret_from_except_lite /* loop back and handle more */
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4: stb r5,PACAPROCENABLED(r13)
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
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#endif
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ld r3,_MSR(r1)
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@ -538,18 +539,23 @@ do_work:
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lwz r8,TI_PREEMPT(r9)
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cmpwi cr1,r8,0
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#ifdef CONFIG_PPC_ISERIES
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BEGIN_FW_FTR_SECTION
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ld r0,SOFTE(r1)
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cmpdi r0,0
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#else
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andi. r0,r3,MSR_EE
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
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#endif
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BEGIN_FW_FTR_SECTION
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andi. r0,r3,MSR_EE
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END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
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crandc eq,cr1*4+eq,eq
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bne restore
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/* here we are preempting the current task */
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1:
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#ifdef CONFIG_PPC_ISERIES
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BEGIN_FW_FTR_SECTION
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li r0,1
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stb r0,PACAPROCENABLED(r13)
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
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#endif
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ori r10,r10,MSR_EE
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mtmsrd r10,1 /* reenable interrupts */
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@ -33,6 +33,7 @@
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#include <asm/hvcall.h>
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#include <asm/iseries/lpar_map.h>
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#include <asm/thread_info.h>
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#include <asm/firmware.h>
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#ifdef CONFIG_PPC_ISERIES
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#define DO_SOFT_DISABLE
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@ -365,19 +366,28 @@ label##_iSeries: \
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#ifdef DO_SOFT_DISABLE
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#define DISABLE_INTS \
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BEGIN_FW_FTR_SECTION; \
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lbz r10,PACAPROCENABLED(r13); \
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li r11,0; \
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std r10,SOFTE(r1); \
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mfmsr r10; \
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stb r11,PACAPROCENABLED(r13); \
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ori r10,r10,MSR_EE; \
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mtmsrd r10,1
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mtmsrd r10,1; \
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
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#define ENABLE_INTS \
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BEGIN_FW_FTR_SECTION; \
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lbz r10,PACAPROCENABLED(r13); \
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mfmsr r11; \
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std r10,SOFTE(r1); \
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ori r11,r11,MSR_EE; \
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES); \
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BEGIN_FW_FTR_SECTION; \
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ld r12,_MSR(r1); \
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mfmsr r11; \
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rlwimi r11,r12,0,MSR_EE; \
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END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \
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mtmsrd r11,1
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#else /* hard enable/disable interrupts */
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@ -1071,8 +1081,10 @@ _GLOBAL(slb_miss_realmode)
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ld r3,PACA_EXSLB+EX_R3(r13)
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lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
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#ifdef CONFIG_PPC_ISERIES
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BEGIN_FW_FTR_SECTION
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ld r11,PACALPPACAPTR(r13)
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ld r11,LPPACASRR0(r11) /* get SRR0 value */
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
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#endif /* CONFIG_PPC_ISERIES */
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mtlr r10
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@ -1087,8 +1099,10 @@ _GLOBAL(slb_miss_realmode)
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.machine pop
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#ifdef CONFIG_PPC_ISERIES
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BEGIN_FW_FTR_SECTION
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mtspr SPRN_SRR0,r11
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mtspr SPRN_SRR1,r12
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
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#endif /* CONFIG_PPC_ISERIES */
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ld r9,PACA_EXSLB+EX_R9(r13)
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ld r10,PACA_EXSLB+EX_R10(r13)
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@ -1301,6 +1315,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
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cmpdi r3,0 /* see if hash_page succeeded */
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#ifdef DO_SOFT_DISABLE
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BEGIN_FW_FTR_SECTION
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/*
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* If we had interrupts soft-enabled at the point where the
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* DSI/ISI occurred, and an interrupt came in during hash_page,
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@ -1321,12 +1336,14 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
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ld r3,SOFTE(r1)
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bl .local_irq_restore
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b 11f
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#else
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
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#endif
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BEGIN_FW_FTR_SECTION
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beq fast_exception_return /* Return from exception on success */
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ble- 12f /* Failure return from hash_page */
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/* fall through */
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#endif
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END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
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/* Here we have a page fault that hash_page can't handle. */
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_GLOBAL(handle_page_fault)
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@ -1861,7 +1878,9 @@ _GLOBAL(__secondary_start)
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LOAD_REG_ADDR(r3, .start_secondary_prolog)
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LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
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#ifdef DO_SOFT_DISABLE
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BEGIN_FW_FTR_SECTION
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ori r4,r4,MSR_EE
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
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#endif
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mtspr SPRN_SRR0,r3
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mtspr SPRN_SRR1,r4
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@ -1986,6 +2005,7 @@ _STATIC(start_here_common)
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*/
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li r3,0
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bl .do_cpu_ftr_fixups
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bl .do_fw_ftr_fixups
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/* ptr to current */
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LOAD_REG_IMMEDIATE(r4, init_task)
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@ -2000,11 +2020,13 @@ _STATIC(start_here_common)
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/* Load up the kernel context */
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5:
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#ifdef DO_SOFT_DISABLE
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BEGIN_FW_FTR_SECTION
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li r5,0
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stb r5,PACAPROCENABLED(r13) /* Soft Disabled */
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mfmsr r5
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ori r5,r5,MSR_EE /* Hard Enabled */
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mtmsrd r5
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
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#endif
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bl .start_kernel
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@ -325,6 +325,52 @@ _GLOBAL(do_cpu_ftr_fixups)
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isync
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b 1b
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/*
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* do_fw_ftr_fixups - goes through the list of firmware feature fixups
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* and writes nop's over sections of code that don't apply for this firmware.
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* r3 = data offset (not changed)
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*/
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_GLOBAL(do_fw_ftr_fixups)
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/* Get firmware features */
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LOAD_REG_IMMEDIATE(r6,powerpc_firmware_features)
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sub r6,r6,r3
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ld r4,0(r6)
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/* Get the fixup table */
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LOAD_REG_IMMEDIATE(r6,__start___fw_ftr_fixup)
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sub r6,r6,r3
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LOAD_REG_IMMEDIATE(r7,__stop___fw_ftr_fixup)
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sub r7,r7,r3
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/* Do the fixup */
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1: cmpld r6,r7
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bgelr
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addi r6,r6,32
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ld r8,-32(r6) /* mask */
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and r8,r8,r4
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ld r9,-24(r6) /* value */
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cmpld r8,r9
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beq 1b
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ld r8,-16(r6) /* section begin */
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ld r9,-8(r6) /* section end */
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subf. r9,r8,r9
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beq 1b
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/* write nops over the section of code */
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/* todo: if large section, add a branch at the start of it */
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srwi r9,r9,2
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mtctr r9
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sub r8,r8,r3
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lis r0,0x60000000@h /* nop */
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3: stw r0,0(r8)
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BEGIN_FTR_SECTION
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dcbst 0,r8 /* suboptimal, but simpler */
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sync
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icbi 0,r8
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END_FTR_SECTION_IFSET(CPU_FTR_SPLIT_ID_CACHE)
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addi r8,r8,4
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bdnz 3b
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sync /* additional sync needed on g4 */
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isync
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b 1b
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#if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE)
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/*
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* Do an IO access in real mode
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@ -132,6 +132,14 @@ SECTIONS
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*(__ftr_fixup)
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__stop___ftr_fixup = .;
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}
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#ifdef CONFIG_PPC64
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. = ALIGN(8);
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__fw_ftr_fixup : {
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__start___fw_ftr_fixup = .;
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*(__fw_ftr_fixup)
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__stop___fw_ftr_fixup = .;
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}
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#endif
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. = ALIGN(PAGE_SIZE);
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.init.ramfs : {
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@ -21,6 +21,7 @@
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#include <asm/page.h>
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#include <asm/mmu.h>
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#include <asm/pgtable.h>
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#include <asm/firmware.h>
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/* void slb_allocate_realmode(unsigned long ea);
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*
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* dont have any LRU information to help us choose a slot.
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*/
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#ifdef CONFIG_PPC_ISERIES
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BEGIN_FW_FTR_SECTION
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/*
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* On iSeries, the "bolted" stack segment can be cast out on
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* shared processor switch so we need to check for a miss on
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@ -194,6 +196,7 @@ slb_finish_load:
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li r10,SLB_NUM_BOLTED-1 /* Stack goes in last bolted slot */
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cmpld r9,r3
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beq 3f
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END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
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#endif /* CONFIG_PPC_ISERIES */
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ld r10,PACASTABRR(r13)
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@ -14,34 +14,36 @@
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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#include <asm/asm-compat.h>
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/* firmware feature bitmask values */
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#define FIRMWARE_MAX_FEATURES 63
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#define FW_FEATURE_PFT (1UL<<0)
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#define FW_FEATURE_TCE (1UL<<1)
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#define FW_FEATURE_SPRG0 (1UL<<2)
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#define FW_FEATURE_DABR (1UL<<3)
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#define FW_FEATURE_COPY (1UL<<4)
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#define FW_FEATURE_ASR (1UL<<5)
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#define FW_FEATURE_DEBUG (1UL<<6)
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#define FW_FEATURE_TERM (1UL<<7)
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#define FW_FEATURE_PERF (1UL<<8)
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#define FW_FEATURE_DUMP (1UL<<9)
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#define FW_FEATURE_INTERRUPT (1UL<<10)
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#define FW_FEATURE_MIGRATE (1UL<<11)
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#define FW_FEATURE_PERFMON (1UL<<12)
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#define FW_FEATURE_CRQ (1UL<<13)
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#define FW_FEATURE_VIO (1UL<<14)
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#define FW_FEATURE_RDMA (1UL<<15)
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#define FW_FEATURE_LLAN (1UL<<16)
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#define FW_FEATURE_BULK (1UL<<17)
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#define FW_FEATURE_XDABR (1UL<<18)
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#define FW_FEATURE_MULTITCE (1UL<<19)
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#define FW_FEATURE_SPLPAR (1UL<<20)
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#define FW_FEATURE_ISERIES (1UL<<21)
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#define FW_FEATURE_LPAR (1UL<<22)
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#define FW_FEATURE_PFT ASM_CONST(0x0000000000000001)
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#define FW_FEATURE_TCE ASM_CONST(0x0000000000000002)
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#define FW_FEATURE_SPRG0 ASM_CONST(0x0000000000000004)
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#define FW_FEATURE_DABR ASM_CONST(0x0000000000000008)
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#define FW_FEATURE_COPY ASM_CONST(0x0000000000000010)
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#define FW_FEATURE_ASR ASM_CONST(0x0000000000000020)
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#define FW_FEATURE_DEBUG ASM_CONST(0x0000000000000040)
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#define FW_FEATURE_TERM ASM_CONST(0x0000000000000080)
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#define FW_FEATURE_PERF ASM_CONST(0x0000000000000100)
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#define FW_FEATURE_DUMP ASM_CONST(0x0000000000000200)
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#define FW_FEATURE_INTERRUPT ASM_CONST(0x0000000000000400)
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#define FW_FEATURE_MIGRATE ASM_CONST(0x0000000000000800)
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#define FW_FEATURE_PERFMON ASM_CONST(0x0000000000001000)
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#define FW_FEATURE_CRQ ASM_CONST(0x0000000000002000)
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#define FW_FEATURE_VIO ASM_CONST(0x0000000000004000)
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#define FW_FEATURE_RDMA ASM_CONST(0x0000000000008000)
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#define FW_FEATURE_LLAN ASM_CONST(0x0000000000010000)
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#define FW_FEATURE_BULK ASM_CONST(0x0000000000020000)
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#define FW_FEATURE_XDABR ASM_CONST(0x0000000000040000)
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#define FW_FEATURE_MULTITCE ASM_CONST(0x0000000000080000)
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#define FW_FEATURE_SPLPAR ASM_CONST(0x0000000000100000)
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#define FW_FEATURE_ISERIES ASM_CONST(0x0000000000200000)
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#define FW_FEATURE_LPAR ASM_CONST(0x0000000000400000)
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#ifndef __ASSEMBLY__
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enum {
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#ifdef CONFIG_PPC64
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@ -94,6 +96,23 @@ extern void machine_check_fwnmi(void);
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/* This is true if we are using the firmware NMI handler (typically LPAR) */
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extern int fwnmi_active;
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#else /* __ASSEMBLY__ */
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#define BEGIN_FW_FTR_SECTION 96:
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#define END_FW_FTR_SECTION(msk, val) \
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97: \
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.section __fw_ftr_fixup,"a"; \
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.align 3; \
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.llong msk; \
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.llong val; \
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.llong 96b; \
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.llong 97b; \
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.previous
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#define END_FW_FTR_SECTION_IFSET(msk) END_FW_FTR_SECTION((msk), (msk))
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#define END_FW_FTR_SECTION_IFCLR(msk) END_FW_FTR_SECTION((msk), 0)
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* __ASM_POWERPC_FIRMWARE_H */
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