hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge remote-tracking branch 'tip/timers/core/timers/core' into clockevents/3.16

This commit is contained in:
Daniel Lezcano 2014-05-16 16:08:32 +02:00
parent 8cffcb0ca3 2779ac167b
commit 3f04e3d3eb
387 changed files with 3483 additions and 2141 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
Documentation/devicetree/bindings/arm/arch_timer.txt
View File

@ -19,6 +19,9 @@ to deliver its interrupts via SPIs.
- clock-frequency : The frequency of the main counter, in Hz. Optional. - clock-frequency : The frequency of the main counter, in Hz. Optional.
- always-on : a boolean property. If present, the timer is powered through an
always-on power domain, therefore it never loses context.
Example: Example:
timer { timer {

2
Documentation/devicetree/bindings/net/socfpga-dwmac.txt
View File

@ -23,5 +23,5 @@ gmac0: ethernet@ff700000 {
interrupt-names = "macirq"; interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */ mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
clocks = <&emac_0_clk>; clocks = <&emac_0_clk>;
clocks-names = "stmmaceth"; clock-names = "stmmaceth";
}; };

2
Documentation/devicetree/bindings/net/stmmac.txt
View File

@ -33,7 +33,7 @@ Optional properties:
- max-frame-size: See ethernet.txt file in the same directory - max-frame-size: See ethernet.txt file in the same directory
- clocks: If present, the first clock should be the GMAC main clock, - clocks: If present, the first clock should be the GMAC main clock,
further clocks may be specified in derived bindings. further clocks may be specified in derived bindings.
- clocks-names: One name for each entry in the clocks property, the - clock-names: One name for each entry in the clocks property, the
first one should be "stmmaceth". first one should be "stmmaceth".
Examples: Examples:

4
Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt
View File

@ -83,7 +83,7 @@ Example:
reg = <0xfe61f080 0x4>; reg = <0xfe61f080 0x4>;
reg-names = "irqmux"; reg-names = "irqmux";
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux"; interrupt-names = "irqmux";
ranges = <0 0xfe610000 0x5000>; ranges = <0 0xfe610000 0x5000>;
PIO0: gpio@fe610000 { PIO0: gpio@fe610000 {
@ -165,7 +165,7 @@ sdhci0:sdhci@fe810000{
interrupt-parent = <&PIO3>; interrupt-parent = <&PIO3>;
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; /* Interrupt line via PIO3-3 */ interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; /* Interrupt line via PIO3-3 */
interrupts-names = "card-detect"; interrupt-names = "card-detect";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc>; pinctrl-0 = <&pinctrl_mmc>;
}; };

2
Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt
View File

@ -47,7 +47,7 @@ mcasp0: mcasp0@1d00000 {
reg = <0x100000 0x3000>; reg = <0x100000 0x3000>;
reg-names "mpu"; reg-names "mpu";
interrupts = <82>, <83>; interrupts = <82>, <83>;
interrupts-names = "tx", "rx"; interrupt-names = "tx", "rx";
op-mode = <0>; /* MCASP_IIS_MODE */ op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>; tdm-slots = <2>;
serial-dir = < serial-dir = <

6
Documentation/devicetree/bindings/sound/tlv320aic31xx.txt
View File

@ -13,6 +13,9 @@ Required properties:
"ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP) "ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP)
- reg - <int> - I2C slave address - reg - <int> - I2C slave address
- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply,
DVDD-supply : power supplies for the device as covered in
Documentation/devicetree/bindings/regulator/regulator.txt
Optional properties: Optional properties:
@ -24,9 +27,6 @@ Optional properties:
3 or MICBIAS_AVDD - MICBIAS output is connected to AVDD 3 or MICBIAS_AVDD - MICBIAS output is connected to AVDD
If this node is not mentioned or if the value is unknown, then If this node is not mentioned or if the value is unknown, then
micbias is set to 2.0V. micbias is set to 2.0V.
- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply,
DVDD-supply : power supplies for the device as covered in
Documentation/devicetree/bindings/regulator/regulator.txt
CODEC output pins: CODEC output pins:
* HPL * HPL

6
Documentation/timers/timer_stats.txt
View File

@ -39,9 +39,9 @@ To stop a sample period issue:
The statistics can be retrieved by: The statistics can be retrieved by:
# cat /proc/timer_stats # cat /proc/timer_stats
The readout of /proc/timer_stats automatically disables sampling. The sampled While sampling is enabled, each readout from /proc/timer_stats will see
information is kept until a new sample period is started. This allows multiple newly updated statistics. Once sampling is disabled, the sampled information
readouts. is kept until a new sample period is started. This allows multiple readouts.
Sample output of /proc/timer_stats: Sample output of /proc/timer_stats:

11
MAINTAINERS
View File

@ -3485,6 +3485,12 @@ S: Maintained
F: drivers/extcon/ F: drivers/extcon/
F: Documentation/extcon/ F: Documentation/extcon/
EXYNOS DP DRIVER
M: Jingoo Han <jg1.han@samsung.com>
L: dri-devel@lists.freedesktop.org
S: Maintained
F: drivers/gpu/drm/exynos/exynos_dp*
EXYNOS MIPI DISPLAY DRIVERS EXYNOS MIPI DISPLAY DRIVERS
M: Inki Dae <inki.dae@samsung.com> M: Inki Dae <inki.dae@samsung.com>
M: Donghwa Lee <dh09.lee@samsung.com> M: Donghwa Lee <dh09.lee@samsung.com>
@ -5108,14 +5114,19 @@ F: drivers/s390/kvm/
KERNEL VIRTUAL MACHINE (KVM) FOR ARM KERNEL VIRTUAL MACHINE (KVM) FOR ARM
M: Christoffer Dall <christoffer.dall@linaro.org> M: Christoffer Dall <christoffer.dall@linaro.org>
M: Marc Zyngier <marc.zyngier@arm.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: kvmarm@lists.cs.columbia.edu L: kvmarm@lists.cs.columbia.edu
W: http://systems.cs.columbia.edu/projects/kvm-arm W: http://systems.cs.columbia.edu/projects/kvm-arm
S: Supported S: Supported
F: arch/arm/include/uapi/asm/kvm* F: arch/arm/include/uapi/asm/kvm*
F: arch/arm/include/asm/kvm* F: arch/arm/include/asm/kvm*
F: arch/arm/kvm/ F: arch/arm/kvm/
F: virt/kvm/arm/
F: include/kvm/arm_*
KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64) KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64)
M: Christoffer Dall <christoffer.dall@linaro.org>
M: Marc Zyngier <marc.zyngier@arm.com> M: Marc Zyngier <marc.zyngier@arm.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: kvmarm@lists.cs.columbia.edu L: kvmarm@lists.cs.columbia.edu

2
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 3 VERSION = 3
PATCHLEVEL = 15 PATCHLEVEL = 15
SUBLEVEL = 0 SUBLEVEL = 0
EXTRAVERSION = -rc2 EXTRAVERSION = -rc3
NAME = Shuffling Zombie Juror NAME = Shuffling Zombie Juror
# *DOCUMENTATION* # *DOCUMENTATION*

8
arch/arc/kernel/entry.S
View File

@ -614,11 +614,13 @@ resume_user_mode_begin:
resume_kernel_mode: resume_kernel_mode:
#ifdef CONFIG_PREEMPT ; Disable Interrupts from this point on
; CONFIG_PREEMPT: This is a must for preempt_schedule_irq()
; This is a must for preempt_schedule_irq() ; !CONFIG_PREEMPT: To ensure restore_regs is intr safe
IRQ_DISABLE r9 IRQ_DISABLE r9
#ifdef CONFIG_PREEMPT
; Can't preempt if preemption disabled ; Can't preempt if preemption disabled
GET_CURR_THR_INFO_FROM_SP r10 GET_CURR_THR_INFO_FROM_SP r10
ld r8, [r10, THREAD_INFO_PREEMPT_COUNT] ld r8, [r10, THREAD_INFO_PREEMPT_COUNT]

17
arch/arm/Kconfig
View File

@ -30,9 +30,9 @@ config ARM
select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
select HAVE_ARCH_TRACEHOOK select HAVE_ARCH_TRACEHOOK
select HAVE_BPF_JIT select HAVE_BPF_JIT
select HAVE_CC_STACKPROTECTOR
select HAVE_CONTEXT_TRACKING select HAVE_CONTEXT_TRACKING
select HAVE_C_RECORDMCOUNT select HAVE_C_RECORDMCOUNT
select HAVE_CC_STACKPROTECTOR
select HAVE_DEBUG_KMEMLEAK select HAVE_DEBUG_KMEMLEAK
select HAVE_DMA_API_DEBUG select HAVE_DMA_API_DEBUG
select HAVE_DMA_ATTRS select HAVE_DMA_ATTRS
@ -311,6 +311,7 @@ config ARCH_MULTIPLATFORM
select ARM_HAS_SG_CHAIN select ARM_HAS_SG_CHAIN
select ARM_PATCH_PHYS_VIRT select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR select AUTO_ZRELADDR
select CLKSRC_OF
select COMMON_CLK select COMMON_CLK
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select MULTI_IRQ_HANDLER select MULTI_IRQ_HANDLER
@ -422,8 +423,8 @@ config ARCH_EFM32
bool "Energy Micro efm32" bool "Energy Micro efm32"
depends on !MMU depends on !MMU
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select AUTO_ZRELADDR
select ARM_NVIC select ARM_NVIC
select AUTO_ZRELADDR
select CLKSRC_OF select CLKSRC_OF
select COMMON_CLK select COMMON_CLK
select CPU_V7M select CPU_V7M
@ -511,8 +512,8 @@ config ARCH_IXP4XX
bool "IXP4xx-based" bool "IXP4xx-based"
depends on MMU depends on MMU
select ARCH_HAS_DMA_SET_COHERENT_MASK select ARCH_HAS_DMA_SET_COHERENT_MASK
select ARCH_SUPPORTS_BIG_ENDIAN
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARCH_SUPPORTS_BIG_ENDIAN
select CLKSRC_MMIO select CLKSRC_MMIO
select CPU_XSCALE select CPU_XSCALE
select DMABOUNCE if PCI select DMABOUNCE if PCI
@ -1110,9 +1111,9 @@ config ARM_NR_BANKS
default 8 default 8
config IWMMXT config IWMMXT
bool "Enable iWMMXt support" if !CPU_PJ4 bool "Enable iWMMXt support"
depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
help help
Enable support for iWMMXt context switching at run time if Enable support for iWMMXt context switching at run time if
running on a CPU that supports it. running on a CPU that supports it.
@ -1575,8 +1576,8 @@ config BIG_LITTLE
config BL_SWITCHER config BL_SWITCHER
bool "big.LITTLE switcher support" bool "big.LITTLE switcher support"
depends on BIG_LITTLE && MCPM && HOTPLUG_CPU depends on BIG_LITTLE && MCPM && HOTPLUG_CPU
select CPU_PM
select ARM_CPU_SUSPEND select ARM_CPU_SUSPEND
select CPU_PM
help help
The big.LITTLE "switcher" provides the core functionality to The big.LITTLE "switcher" provides the core functionality to
transparently handle transition between a cluster of A15's transparently handle transition between a cluster of A15's
@ -1920,9 +1921,9 @@ config XEN
depends on CPU_V7 && !CPU_V6 depends on CPU_V7 && !CPU_V6
depends on !GENERIC_ATOMIC64 depends on !GENERIC_ATOMIC64
depends on MMU depends on MMU
select ARCH_DMA_ADDR_T_64BIT
select ARM_PSCI select ARM_PSCI
select SWIOTLB_XEN select SWIOTLB_XEN
select ARCH_DMA_ADDR_T_64BIT
help help
Say Y if you want to run Linux in a Virtual Machine on Xen on ARM. Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.

12
arch/arm/Kconfig.debug
View File

@ -1030,9 +1030,9 @@ config DEBUG_UART_PHYS
default 0x40100000 if DEBUG_PXA_UART1 default 0x40100000 if DEBUG_PXA_UART1
default 0x42000000 if ARCH_GEMINI default 0x42000000 if ARCH_GEMINI
default 0x7c0003f8 if FOOTBRIDGE default 0x7c0003f8 if FOOTBRIDGE
default 0x80230000 if DEBUG_PICOXCELL_UART
default 0x80070000 if DEBUG_IMX23_UART default 0x80070000 if DEBUG_IMX23_UART
default 0x80074000 if DEBUG_IMX28_UART default 0x80074000 if DEBUG_IMX28_UART
default 0x80230000 if DEBUG_PICOXCELL_UART
default 0x808c0000 if ARCH_EP93XX default 0x808c0000 if ARCH_EP93XX
default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX
@ -1096,22 +1096,22 @@ config DEBUG_UART_VIRT
default 0xfeb26000 if DEBUG_RK3X_UART1 default 0xfeb26000 if DEBUG_RK3X_UART1
default 0xfeb30c00 if DEBUG_KEYSTONE_UART0 default 0xfeb30c00 if DEBUG_KEYSTONE_UART0
default 0xfeb31000 if DEBUG_KEYSTONE_UART1 default 0xfeb31000 if DEBUG_KEYSTONE_UART1
default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE
default 0xfed60000 if DEBUG_RK29_UART0
default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
default 0xfec02000 if DEBUG_SOCFPGA_UART default 0xfec02000 if DEBUG_SOCFPGA_UART
default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE
default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0 default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0
default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1 default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2
default 0xfed12000 if ARCH_KIRKWOOD default 0xfed12000 if ARCH_KIRKWOOD
default 0xfed60000 if DEBUG_RK29_UART0
default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
default 0xfedc0000 if ARCH_EP93XX default 0xfedc0000 if ARCH_EP93XX
default 0xfee003f8 if FOOTBRIDGE default 0xfee003f8 if FOOTBRIDGE
default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
default 0xfef36000 if DEBUG_HIGHBANK_UART
default 0xfee82340 if ARCH_IOP13XX default 0xfee82340 if ARCH_IOP13XX
default 0xfef00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN default 0xfef00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
default 0xfef00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN default 0xfef00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN
default 0xfef36000 if DEBUG_HIGHBANK_UART
default 0xfefff700 if ARCH_IOP33X default 0xfefff700 if ARCH_IOP33X
default 0xff003000 if DEBUG_U300_UART default 0xff003000 if DEBUG_U300_UART
default DEBUG_UART_PHYS if !MMU default DEBUG_UART_PHYS if !MMU

20
arch/arm/boot/dts/Makefile
View File

@ -51,10 +51,9 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \ dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \
bcm21664-garnet.dtb bcm21664-garnet.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
dtb-$(CONFIG_ARCH_BERLIN) += \ dtb-$(CONFIG_ARCH_BERLIN) += \
berlin2-sony-nsz-gs7.dtb \ berlin2-sony-nsz-gs7.dtb \
berlin2cd-google-chromecast.dtb berlin2cd-google-chromecast.dtb
@ -246,6 +245,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap3-sbc-t3730.dtb \ omap3-sbc-t3730.dtb \
omap3-devkit8000.dtb \ omap3-devkit8000.dtb \
omap3-beagle-xm.dtb \ omap3-beagle-xm.dtb \
omap3-beagle-xm-ab.dtb \
omap3-evm.dtb \ omap3-evm.dtb \
omap3-evm-37xx.dtb \ omap3-evm-37xx.dtb \
omap3-ldp.dtb \ omap3-ldp.dtb \
@ -294,13 +294,6 @@ dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \ dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \ qcom-msm8960-cdp.dtb \
qcom-apq8074-dragonboard.dtb qcom-apq8074-dragonboard.dtb
dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
ste-hrefprev60-stuib.dtb \
ste-hrefprev60-tvk.dtb \
ste-hrefv60plus-stuib.dtb \
ste-hrefv60plus-tvk.dtb \
ste-ccu8540.dtb \
ste-ccu9540.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \ dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
s3c6410-smdk6410.dtb s3c6410-smdk6410.dtb
@ -369,9 +362,16 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra30-cardhu-a04.dtb \ tegra30-cardhu-a04.dtb \
tegra114-dalmore.dtb \ tegra114-dalmore.dtb \
tegra124-venice2.dtb tegra124-venice2.dtb
dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
ste-hrefprev60-stuib.dtb \
ste-hrefprev60-tvk.dtb \
ste-hrefv60plus-stuib.dtb \
ste-hrefv60plus-tvk.dtb \
ste-ccu8540.dtb \
ste-ccu9540.dtb
dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \ dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
versatile-pb.dtb versatile-pb.dtb
dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
vexpress-v2p-ca9.dtb \ vexpress-v2p-ca9.dtb \
vexpress-v2p-ca15-tc1.dtb \ vexpress-v2p-ca15-tc1.dtb \

4
arch/arm/boot/dts/am335x-bone-common.dtsi
View File

@ -183,7 +183,7 @@
&usb { &usb {
status = "okay"; status = "okay";
control@44e10000 { control@44e10620 {
status = "okay"; status = "okay";
}; };
@ -204,7 +204,7 @@
dr_mode = "host"; dr_mode = "host";
}; };
dma-controller@07402000 { dma-controller@47402000 {
status = "okay"; status = "okay";
}; };
}; };

8
arch/arm/boot/dts/am335x-evm.dts
View File

@ -301,8 +301,8 @@
am335x_evm_audio_pins: am335x_evm_audio_pins { am335x_evm_audio_pins: am335x_evm_audio_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rx_dv.mcasp1_aclkx */ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_txd3.mcasp1_fsx */ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
>; >;
@ -331,7 +331,7 @@
&usb { &usb {
status = "okay"; status = "okay";
control@44e10000 { control@44e10620 {
status = "okay"; status = "okay";
}; };
@ -352,7 +352,7 @@
dr_mode = "host"; dr_mode = "host";
}; };
dma-controller@07402000 { dma-controller@47402000 {
status = "okay"; status = "okay";
}; };
}; };

4
arch/arm/boot/dts/am335x-evmsk.dts
View File

@ -364,7 +364,7 @@
&usb { &usb {
status = "okay"; status = "okay";
control@44e10000 { control@44e10620 {
status = "okay"; status = "okay";
}; };
@ -385,7 +385,7 @@
dr_mode = "host"; dr_mode = "host";
}; };
dma-controller@07402000 { dma-controller@47402000 {
status = "okay"; status = "okay";
}; };
}; };

5
arch/arm/boot/dts/am335x-igep0033.dtsi
View File

@ -118,7 +118,6 @@
reg = <0 0 0>; /* CS0, offset 0 */ reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>; nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8"; ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
gpmc,device-width = <1>; gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>; gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>; gpmc,cs-on-ns = <0>;
@ -202,7 +201,7 @@
&usb { &usb {
status = "okay"; status = "okay";
control@44e10000 { control@44e10620 {
status = "okay"; status = "okay";
}; };
@ -223,7 +222,7 @@
dr_mode = "host"; dr_mode = "host";
}; };
dma-controller@07402000 { dma-controller@47402000 {
status = "okay"; status = "okay";
}; };
}; };

10
arch/arm/boot/dts/am33xx.dtsi
View File

@ -72,7 +72,7 @@
}; };
/* /*
* The soc node represents the soc top level view. It is uses for IPs * The soc node represents the soc top level view. It is used for IPs
* that are not memory mapped in the MPU view or for the MPU itself. * that are not memory mapped in the MPU view or for the MPU itself.
*/ */
soc { soc {
@ -94,8 +94,8 @@
/* /*
* XXX: Use a flat representation of the AM33XX interconnect. * XXX: Use a flat representation of the AM33XX interconnect.
* The real AM33XX interconnect network is quite complex.Since * The real AM33XX interconnect network is quite complex. Since
* that will not bring real advantage to represent that in DT * it will not bring real advantage to represent that in DT
* for the moment, just use a fake OCP bus entry to represent * for the moment, just use a fake OCP bus entry to represent
* the whole bus hierarchy. * the whole bus hierarchy.
*/ */
@ -802,7 +802,7 @@
<0x46000000 0x400000>; <0x46000000 0x400000>;
reg-names = "mpu", "dat"; reg-names = "mpu", "dat";
interrupts = <80>, <81>; interrupts = <80>, <81>;
interrupts-names = "tx", "rx"; interrupt-names = "tx", "rx";
status = "disabled"; status = "disabled";
dmas = <&edma 8>, dmas = <&edma 8>,
<&edma 9>; <&edma 9>;
@ -816,7 +816,7 @@
<0x46400000 0x400000>; <0x46400000 0x400000>;
reg-names = "mpu", "dat"; reg-names = "mpu", "dat";
interrupts = <82>, <83>; interrupts = <82>, <83>;
interrupts-names = "tx", "rx"; interrupt-names = "tx", "rx";
status = "disabled"; status = "disabled";
dmas = <&edma 10>, dmas = <&edma 10>,
<&edma 11>; <&edma 11>;

4
arch/arm/boot/dts/am4372.dtsi
View File

@ -691,7 +691,7 @@
<0x46000000 0x400000>; <0x46000000 0x400000>;
reg-names = "mpu", "dat"; reg-names = "mpu", "dat";
interrupts = <80>, <81>; interrupts = <80>, <81>;
interrupts-names = "tx", "rx"; interrupt-names = "tx", "rx";
status = "disabled"; status = "disabled";
dmas = <&edma 8>, dmas = <&edma 8>,
<&edma 9>; <&edma 9>;
@ -705,7 +705,7 @@
<0x46400000 0x400000>; <0x46400000 0x400000>;
reg-names = "mpu", "dat"; reg-names = "mpu", "dat";
interrupts = <82>, <83>; interrupts = <82>, <83>;
interrupts-names = "tx", "rx"; interrupt-names = "tx", "rx";
status = "disabled"; status = "disabled";
dmas = <&edma 10>, dmas = <&edma 10>,
<&edma 11>; <&edma 11>;

1
arch/arm/boot/dts/armada-370-xp.dtsi
View File

@ -230,6 +230,7 @@
#size-cells = <0>; #size-cells = <0>;
compatible = "marvell,orion-mdio"; compatible = "marvell,orion-mdio";
reg = <0x72004 0x4>; reg = <0x72004 0x4>;
clocks = <&gateclk 4>;
}; };
eth1: ethernet@74000 { eth1: ethernet@74000 {

1
arch/arm/boot/dts/armada-38x.dtsi
View File

@ -336,6 +336,7 @@
#size-cells = <0>; #size-cells = <0>;
compatible = "marvell,orion-mdio"; compatible = "marvell,orion-mdio";
reg = <0x72004 0x4>; reg = <0x72004 0x4>;
clocks = <&gateclk 4>;
}; };
coredivclk: clock@e4250 { coredivclk: clock@e4250 {

4
arch/arm/boot/dts/dra7.dtsi
View File

@ -80,7 +80,7 @@
}; };
/* /*
* The soc node represents the soc top level view. It is uses for IPs * The soc node represents the soc top level view. It is used for IPs
* that are not memory mapped in the MPU view or for the MPU itself. * that are not memory mapped in the MPU view or for the MPU itself.
*/ */
soc { soc {
@ -94,7 +94,7 @@
/* /*
* XXX: Use a flat representation of the SOC interconnect. * XXX: Use a flat representation of the SOC interconnect.
* The real OMAP interconnect network is quite complex. * The real OMAP interconnect network is quite complex.
* Since that will not bring real advantage to represent that in DT for * Since it will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus * the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy. * hierarchy.
*/ */

2
arch/arm/boot/dts/dra7xx-clocks.dtsi
View File

@ -1640,7 +1640,7 @@
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,mux-clock"; compatible = "ti,mux-clock";
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>; clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
ti,bit-shift = <28>; ti,bit-shift = <24>;
reg = <0x1860>; reg = <0x1860>;
}; };

1
arch/arm/boot/dts/imx25.dtsi
View File

@ -56,6 +56,7 @@
osc { osc {
compatible = "fsl,imx-osc", "fixed-clock"; compatible = "fsl,imx-osc", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>; clock-frequency = <24000000>;
}; };
}; };

1
arch/arm/boot/dts/imx27-apf27.dts
View File

@ -29,6 +29,7 @@
osc26m { osc26m {
compatible = "fsl,imx-osc26m", "fixed-clock"; compatible = "fsl,imx-osc26m", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>; clock-frequency = <0>;
}; };
}; };

1
arch/arm/boot/dts/imx27.dtsi
View File

@ -48,6 +48,7 @@
osc26m { osc26m {
compatible = "fsl,imx-osc26m", "fixed-clock"; compatible = "fsl,imx-osc26m", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>; clock-frequency = <26000000>;
}; };
}; };

4
arch/arm/boot/dts/imx50.dtsi
View File

@ -53,21 +53,25 @@
ckil { ckil {
compatible = "fsl,imx-ckil", "fixed-clock"; compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>; clock-frequency = <32768>;
}; };
ckih1 { ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock"; compatible = "fsl,imx-ckih1", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <22579200>; clock-frequency = <22579200>;
}; };
ckih2 { ckih2 {
compatible = "fsl,imx-ckih2", "fixed-clock"; compatible = "fsl,imx-ckih2", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>; clock-frequency = <0>;
}; };
osc { osc {
compatible = "fsl,imx-osc", "fixed-clock"; compatible = "fsl,imx-osc", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>; clock-frequency = <24000000>;
}; };
}; };

4
arch/arm/boot/dts/imx51.dtsi
View File

@ -50,21 +50,25 @@
ckil { ckil {
compatible = "fsl,imx-ckil", "fixed-clock"; compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>; clock-frequency = <32768>;
}; };
ckih1 { ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock"; compatible = "fsl,imx-ckih1", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>; clock-frequency = <0>;
}; };
ckih2 { ckih2 {
compatible = "fsl,imx-ckih2", "fixed-clock"; compatible = "fsl,imx-ckih2", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>; clock-frequency = <0>;
}; };
osc { osc {
compatible = "fsl,imx-osc", "fixed-clock"; compatible = "fsl,imx-osc", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>; clock-frequency = <24000000>;
}; };
}; };

23
arch/arm/boot/dts/imx53-m53evk.dts
View File

@ -17,7 +17,8 @@
compatible = "denx,imx53-m53evk", "fsl,imx53"; compatible = "denx,imx53-m53evk", "fsl,imx53";
memory { memory {
reg = <0x70000000 0x20000000>; reg = <0x70000000 0x20000000>,
<0xb0000000 0x20000000>;
}; };
soc { soc {
@ -193,17 +194,17 @@
irq-trigger = <0x1>; irq-trigger = <0x1>;
stmpe_touchscreen { stmpe_touchscreen {
compatible = "stmpe,ts"; compatible = "st,stmpe-ts";
reg = <0>; reg = <0>;
ts,sample-time = <4>; st,sample-time = <4>;
ts,mod-12b = <1>; st,mod-12b = <1>;
ts,ref-sel = <0>; st,ref-sel = <0>;
ts,adc-freq = <1>; st,adc-freq = <1>;
ts,ave-ctrl = <3>; st,ave-ctrl = <3>;
ts,touch-det-delay = <3>; st,touch-det-delay = <3>;
ts,settling = <4>; st,settling = <4>;
ts,fraction-z = <7>; st,fraction-z = <7>;
ts,i-drive = <1>; st,i-drive = <1>;
}; };
}; };

3
arch/arm/boot/dts/imx53-qsb-common.dtsi
View File

@ -14,7 +14,8 @@
/ { / {
memory { memory {
reg = <0x70000000 0x40000000>; reg = <0x70000000 0x20000000>,
<0xb0000000 0x20000000>;
}; };
display0: display@di0 { display0: display@di0 {

11
arch/arm/boot/dts/imx53-tx53-x03x.dts
View File

@ -25,12 +25,17 @@
soc { soc {
display: display@di0 { display: display@di0 {
compatible = "fsl,imx-parallel-display"; compatible = "fsl,imx-parallel-display";
crtcs = <&ipu 0>;
interface-pix-fmt = "rgb24"; interface-pix-fmt = "rgb24";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgb24_vga1>; pinctrl-0 = <&pinctrl_rgb24_vga1>;
status = "okay"; status = "okay";
port {
display0_in: endpoint {
remote-endpoint = <&ipu_di0_disp0>;
};
};
display-timings { display-timings {
VGA { VGA {
clock-frequency = <25200000>; clock-frequency = <25200000>;
@ -293,6 +298,10 @@
}; };
}; };
&ipu_di0_disp0 {
remote-endpoint = <&display0_in>;
};
&kpp { &kpp {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_kpp>; pinctrl-0 = <&pinctrl_kpp>;

6
arch/arm/boot/dts/imx53.dtsi
View File

@ -70,21 +70,25 @@
ckil { ckil {
compatible = "fsl,imx-ckil", "fixed-clock"; compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>; clock-frequency = <32768>;
}; };
ckih1 { ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock"; compatible = "fsl,imx-ckih1", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <22579200>; clock-frequency = <22579200>;
}; };
ckih2 { ckih2 {
compatible = "fsl,imx-ckih2", "fixed-clock"; compatible = "fsl,imx-ckih2", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>; clock-frequency = <0>;
}; };
osc { osc {
compatible = "fsl,imx-osc", "fixed-clock"; compatible = "fsl,imx-osc", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>; clock-frequency = <24000000>;
}; };
}; };
@ -430,7 +434,7 @@
port { port {
lvds1_in: endpoint { lvds1_in: endpoint {
remote-endpoint = <&ipu_di0_lvds0>; remote-endpoint = <&ipu_di1_lvds1>;
}; };
}; };
}; };

48
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
View File

@ -19,7 +19,10 @@
compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q"; compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";
aliases { aliases {
gpio7 = &stmpe_gpio; gpio7 = &stmpe_gpio1;
gpio8 = &stmpe_gpio2;
stmpe-i2c0 = &stmpe1;
stmpe-i2c1 = &stmpe2;
}; };
memory { memory {
@ -40,13 +43,15 @@
regulator-always-on; regulator-always-on;
}; };
reg_usb_otg_vbus: regulator@1 { reg_usb_otg_switch: regulator@1 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <1>; reg = <1>;
regulator-name = "usb_otg_vbus"; regulator-name = "usb_otg_switch";
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
gpio = <&gpio7 12 0>; gpio = <&gpio7 12 0>;
regulator-boot-on;
regulator-always-on;
}; };
reg_usb_host1: regulator@2 { reg_usb_host1: regulator@2 {
@ -65,23 +70,23 @@
led-blue { led-blue {
label = "blue"; label = "blue";
gpios = <&stmpe_gpio 8 GPIO_ACTIVE_HIGH>; gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat"; linux,default-trigger = "heartbeat";
}; };
led-green { led-green {
label = "green"; label = "green";
gpios = <&stmpe_gpio 9 GPIO_ACTIVE_HIGH>; gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
}; };
led-pink { led-pink {
label = "pink"; label = "pink";
gpios = <&stmpe_gpio 10 GPIO_ACTIVE_HIGH>; gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
}; };
led-red { led-red {
label = "red"; label = "red";
gpios = <&stmpe_gpio 11 GPIO_ACTIVE_HIGH>; gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
}; };
}; };
}; };
@ -99,7 +104,8 @@
clock-frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2 pinctrl-0 = <&pinctrl_i2c2
&pinctrl_stmpe>; &pinctrl_stmpe1
&pinctrl_stmpe2>;
status = "okay"; status = "okay";
pmic: pfuze100@08 { pmic: pfuze100@08 {
@ -205,13 +211,25 @@
}; };
}; };
stmpe: stmpe1601@40 { stmpe1: stmpe1601@40 {
compatible = "st,stmpe1601"; compatible = "st,stmpe1601";
reg = <0x40>; reg = <0x40>;
interrupts = <30 0>; interrupts = <30 0>;
interrupt-parent = <&gpio3>; interrupt-parent = <&gpio3>;
stmpe_gpio: stmpe_gpio { stmpe_gpio1: stmpe_gpio {
#gpio-cells = <2>;
compatible = "st,stmpe-gpio";
};
};
stmpe2: stmpe1601@44 {
compatible = "st,stmpe1601";
reg = <0x44>;
interrupts = <2 0>;
interrupt-parent = <&gpio5>;
stmpe_gpio2: stmpe_gpio {
#gpio-cells = <2>; #gpio-cells = <2>;
compatible = "st,stmpe-gpio"; compatible = "st,stmpe-gpio";
}; };
@ -273,10 +291,14 @@
>; >;
}; };
pinctrl_stmpe: stmpegrp { pinctrl_stmpe1: stmpe1grp {
fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>; fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
}; };
pinctrl_stmpe2: stmpe2grp {
fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
};
pinctrl_uart1: uart1grp { pinctrl_uart1: uart1grp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
@ -293,7 +315,7 @@
pinctrl_usbotg: usbotggrp { pinctrl_usbotg: usbotggrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>; >;
}; };
@ -344,11 +366,11 @@
&usbh1 { &usbh1 {
vbus-supply = <&reg_usb_host1>; vbus-supply = <&reg_usb_host1>;
disable-over-current; disable-over-current;
dr_mode = "host";
status = "okay"; status = "okay";
}; };
&usbotg { &usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>; pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current; disable-over-current;

3
arch/arm/boot/dts/imx6q-gw5400-a.dts
View File

@ -487,9 +487,6 @@
&ldb { &ldb {
status = "okay"; status = "okay";
lvds-channel@0 {
crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
};
}; };
&pcie { &pcie {

3
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
View File

@ -436,9 +436,6 @@
&ldb { &ldb {
status = "okay"; status = "okay";
lvds-channel@0 {
crtcs = <&ipu1 0>, <&ipu1 1>;
};
}; };
&pcie { &pcie {

22
arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
View File

@ -26,25 +26,25 @@
/* GPIO16 -> AR8035 25MHz */ /* GPIO16 -> AR8035 25MHz */
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
/* AR8035 pin strapping: IO voltage: pull up */ /* AR8035 pin strapping: IO voltage: pull up */
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
/* AR8035 pin strapping: PHYADDR#0: pull down */ /* AR8035 pin strapping: PHYADDR#0: pull down */
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030
/* AR8035 pin strapping: PHYADDR#1: pull down */ /* AR8035 pin strapping: PHYADDR#1: pull down */
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
/* AR8035 pin strapping: MODE#1: pull up */ /* AR8035 pin strapping: MODE#1: pull up */
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
/* AR8035 pin strapping: MODE#3: pull up */ /* AR8035 pin strapping: MODE#3: pull up */
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
/* AR8035 pin strapping: MODE#0: pull down */ /* AR8035 pin strapping: MODE#0: pull down */
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
/* /*
* As the RMII pins are also connected to RGMII * As the RMII pins are also connected to RGMII

13
arch/arm/boot/dts/imx6qdl.dtsi
View File

@ -10,6 +10,8 @@
* http://www.gnu.org/copyleft/gpl.html * http://www.gnu.org/copyleft/gpl.html
*/ */
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi" #include "skeleton.dtsi"
/ { / {
@ -46,8 +48,6 @@
intc: interrupt-controller@00a01000 { intc: interrupt-controller@00a01000 {
compatible = "arm,cortex-a9-gic"; compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>; #interrupt-cells = <3>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller; interrupt-controller;
reg = <0x00a01000 0x1000>, reg = <0x00a01000 0x1000>,
<0x00a00100 0x100>; <0x00a00100 0x100>;
@ -59,16 +59,19 @@
ckil { ckil {
compatible = "fsl,imx-ckil", "fixed-clock"; compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>; clock-frequency = <32768>;
}; };
ckih1 { ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock"; compatible = "fsl,imx-ckih1", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>; clock-frequency = <0>;
}; };
osc { osc {
compatible = "fsl,imx-osc", "fixed-clock"; compatible = "fsl,imx-osc", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>; clock-frequency = <24000000>;
}; };
}; };
@ -138,6 +141,12 @@
0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
num-lanes = <1>; num-lanes = <1>;
interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>; clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
status = "disabled"; status = "disabled";

1
arch/arm/boot/dts/imx6sl-evk.dts
View File

@ -282,6 +282,7 @@
MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000
>; >;
}; };

4
arch/arm/boot/dts/imx6sl.dtsi
View File

@ -68,8 +68,6 @@
intc: interrupt-controller@00a01000 { intc: interrupt-controller@00a01000 {
compatible = "arm,cortex-a9-gic"; compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>; #interrupt-cells = <3>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller; interrupt-controller;
reg = <0x00a01000 0x1000>, reg = <0x00a01000 0x1000>,
<0x00a00100 0x100>; <0x00a00100 0x100>;
@ -81,11 +79,13 @@
ckil { ckil {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>; clock-frequency = <32768>;
}; };
osc { osc {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>; clock-frequency = <24000000>;
}; };
}; };

2
arch/arm/boot/dts/kirkwood-b3.dts
View File

@ -75,7 +75,7 @@
m25p16@0 { m25p16@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "m25p16"; compatible = "st,m25p16";
reg = <0>; reg = <0>;
spi-max-frequency = <40000000>; spi-max-frequency = <40000000>;
mode = <0>; mode = <0>;

2
arch/arm/boot/dts/kirkwood-cloudbox.dts
View File

@ -46,7 +46,7 @@
flash@0 { flash@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "mx25l4005a"; compatible = "mxicy,mx25l4005a";
reg = <0>; reg = <0>;
spi-max-frequency = <20000000>; spi-max-frequency = <20000000>;
mode = <0>; mode = <0>;

2
arch/arm/boot/dts/kirkwood-dreamplug.dts
View File

@ -43,7 +43,7 @@
m25p40@0 { m25p40@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "mx25l1606e"; compatible = "mxicy,mx25l1606e";
reg = <0>; reg = <0>;
spi-max-frequency = <50000000>; spi-max-frequency = <50000000>;
mode = <0>; mode = <0>;

2
arch/arm/boot/dts/kirkwood-laplug.dts
View File

@ -48,7 +48,7 @@
status = "okay"; status = "okay";
eeprom@50 { eeprom@50 {
compatible = "at,24c04"; compatible = "atmel,24c04";
pagesize = <16>; pagesize = <16>;
reg = <0x50>; reg = <0x50>;
}; };

2
arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
View File

@ -56,7 +56,7 @@
flash@0 { flash@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "mx25l12805d"; compatible = "mxicy,mx25l12805d";
reg = <0>; reg = <0>;
spi-max-frequency = <50000000>; spi-max-frequency = <50000000>;
mode = <0>; mode = <0>;

4
arch/arm/boot/dts/kirkwood-ns2-common.dtsi
View File

@ -32,7 +32,7 @@
flash@0 { flash@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "mx25l4005a"; compatible = "mxicy,mx25l4005a";
reg = <0>; reg = <0>;
spi-max-frequency = <20000000>; spi-max-frequency = <20000000>;
mode = <0>; mode = <0>;
@ -50,7 +50,7 @@
status = "okay"; status = "okay";
eeprom@50 { eeprom@50 {
compatible = "at,24c04"; compatible = "atmel,24c04";
pagesize = <16>; pagesize = <16>;
reg = <0x50>; reg = <0x50>;
}; };

2
arch/arm/boot/dts/kirkwood-nsa310.dts
View File

@ -104,7 +104,7 @@
status = "okay"; status = "okay";
adt7476: adt7476a@2e { adt7476: adt7476a@2e {
compatible = "adt7476"; compatible = "adi,adt7476";
reg = <0x2e>; reg = <0x2e>;
}; };
}; };

2
arch/arm/boot/dts/kirkwood-nsa310a.dts
View File

@ -94,7 +94,7 @@
status = "okay"; status = "okay";
lm85: lm85@2e { lm85: lm85@2e {
compatible = "lm85"; compatible = "national,lm85";
reg = <0x2e>; reg = <0x2e>;
}; };
}; };

2
arch/arm/boot/dts/kirkwood-openblocks_a6.dts
View File

@ -40,7 +40,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
s35390a: s35390a@30 { s35390a: s35390a@30 {
compatible = "s35390a"; compatible = "sii,s35390a";
reg = <0x30>; reg = <0x30>;
}; };
}; };

2
arch/arm/boot/dts/kirkwood-openblocks_a7.dts
View File

@ -52,7 +52,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
s24c02: s24c02@50 { s24c02: s24c02@50 {
compatible = "24c02"; compatible = "atmel,24c02";
reg = <0x50>; reg = <0x50>;
}; };
}; };

16
arch/arm/boot/dts/omap3-beagle-xm-ab.dts Normal file
View File

@ -0,0 +1,16 @@
/*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "omap3-beagle-xm.dts"
/ {
/* HS USB Port 2 Power enable was inverted with the xM C */
hsusb2_power: hsusb2_power_reg {
enable-active-high;
};
};

1
arch/arm/boot/dts/omap3-devkit8000.dts
View File

@ -112,7 +112,6 @@
reg = <0 0 0>; /* CS0, offset 0 */ reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <16>; nand-bus-width = <16>;
gpmc,device-nand;
gpmc,sync-clk-ps = <0>; gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>; gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>; gpmc,cs-rd-off-ns = <44>;

1
arch/arm/boot/dts/omap3-lilly-a83x.dtsi
View File

@ -368,7 +368,6 @@
/* no elm on omap3 */ /* no elm on omap3 */
gpmc,mux-add-data = <0>; gpmc,mux-add-data = <0>;
gpmc,device-nand;
gpmc,device-width = <2>; gpmc,device-width = <2>;
gpmc,wait-pin = <0>; gpmc,wait-pin = <0>;
gpmc,wait-monitoring-ns = <0>; gpmc,wait-monitoring-ns = <0>;

2
arch/arm/boot/dts/omap3.dtsi
View File

@ -74,7 +74,7 @@
/* /*
* XXX: Use a flat representation of the OMAP3 interconnect. * XXX: Use a flat representation of the OMAP3 interconnect.
* The real OMAP interconnect network is quite complex. * The real OMAP interconnect network is quite complex.
* Since that will not bring real advantage to represent that in DT for * Since it will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus * the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy. * hierarchy.
*/ */

4
arch/arm/boot/dts/omap4.dtsi
View File

@ -72,7 +72,7 @@
}; };
/* /*
* The soc node represents the soc top level view. It is uses for IPs * The soc node represents the soc top level view. It is used for IPs
* that are not memory mapped in the MPU view or for the MPU itself. * that are not memory mapped in the MPU view or for the MPU itself.
*/ */
soc { soc {
@ -96,7 +96,7 @@
/* /*
* XXX: Use a flat representation of the OMAP4 interconnect. * XXX: Use a flat representation of the OMAP4 interconnect.
* The real OMAP interconnect network is quite complex. * The real OMAP interconnect network is quite complex.
* Since that will not bring real advantage to represent that in DT for * Since it will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus * the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy. * hierarchy.
*/ */

10
arch/arm/boot/dts/omap5.dtsi
View File

@ -93,7 +93,7 @@
}; };
/* /*
* The soc node represents the soc top level view. It is uses for IPs * The soc node represents the soc top level view. It is used for IPs
* that are not memory mapped in the MPU view or for the MPU itself. * that are not memory mapped in the MPU view or for the MPU itself.
*/ */
soc { soc {
@ -107,7 +107,7 @@
/* /*
* XXX: Use a flat representation of the OMAP3 interconnect. * XXX: Use a flat representation of the OMAP3 interconnect.
* The real OMAP interconnect network is quite complex. * The real OMAP interconnect network is quite complex.
* Since that will not bring real advantage to represent that in DT for * Since it will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus * the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy. * hierarchy.
*/ */
@ -813,6 +813,12 @@
<0x4a084c00 0x40>; <0x4a084c00 0x40>;
reg-names = "phy_rx", "phy_tx", "pll_ctrl"; reg-names = "phy_rx", "phy_tx", "pll_ctrl";
ctrl-module = <&omap_control_usb3phy>; ctrl-module = <&omap_control_usb3phy>;
clocks = <&usb_phy_cm_clk32k>,
<&sys_clkin>,
<&usb_otg_ss_refclk960m>;
clock-names = "wkupclk",
"sysclk",
"refclk";
#phy-cells = <0>; #phy-cells = <0>;
}; };
}; };

1
arch/arm/boot/dts/r8a7740.dtsi
View File

@ -28,7 +28,6 @@
gic: interrupt-controller@c2800000 { gic: interrupt-controller@c2800000 {
compatible = "arm,cortex-a9-gic"; compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>; #interrupt-cells = <3>;
#address-cells = <1>;
interrupt-controller; interrupt-controller;
reg = <0xc2800000 0x1000>, reg = <0xc2800000 0x1000>,
<0xc2000000 0x1000>; <0xc2000000 0x1000>;

4
arch/arm/boot/dts/r8a7790-lager.dts
View File

@ -141,12 +141,12 @@
}; };
sdhi0_pins: sd0 { sdhi0_pins: sd0 {
renesas,gpios = "sdhi0_data4", "sdhi0_ctrl"; renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
renesas,function = "sdhi0"; renesas,function = "sdhi0";
}; };
sdhi2_pins: sd2 { sdhi2_pins: sd2 {
renesas,gpios = "sdhi2_data4", "sdhi2_ctrl"; renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
renesas,function = "sdhi2"; renesas,function = "sdhi2";
}; };

6
arch/arm/boot/dts/r8a7791-koelsch.dts
View File

@ -230,17 +230,17 @@
}; };
sdhi0_pins: sd0 { sdhi0_pins: sd0 {
renesas,gpios = "sdhi0_data4", "sdhi0_ctrl"; renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
renesas,function = "sdhi0"; renesas,function = "sdhi0";
}; };
sdhi1_pins: sd1 { sdhi1_pins: sd1 {
renesas,gpios = "sdhi1_data4", "sdhi1_ctrl"; renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
renesas,function = "sdhi1"; renesas,function = "sdhi1";
}; };
sdhi2_pins: sd2 { sdhi2_pins: sd2 {
renesas,gpios = "sdhi2_data4", "sdhi2_ctrl"; renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
renesas,function = "sdhi2"; renesas,function = "sdhi2";
}; };

8
arch/arm/boot/dts/rk3188.dtsi
View File

@ -149,7 +149,7 @@
uart0 { uart0 {
uart0_xfer: uart0-xfer { uart0_xfer: uart0-xfer {
rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_none>, rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>; <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>;
}; };
@ -164,7 +164,7 @@
uart1 { uart1 {
uart1_xfer: uart1-xfer { uart1_xfer: uart1-xfer {
rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_none>, rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>; <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>;
}; };
@ -179,7 +179,7 @@
uart2 { uart2 {
uart2_xfer: uart2-xfer { uart2_xfer: uart2-xfer {
rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_none>, rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>; <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>;
}; };
/* no rts / cts for uart2 */ /* no rts / cts for uart2 */
@ -187,7 +187,7 @@
uart3 { uart3 {
uart3_xfer: uart3-xfer { uart3_xfer: uart3-xfer {
rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_none>, rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>; <RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>;
}; };

1
arch/arm/boot/dts/sh73a0.dtsi
View File

@ -34,7 +34,6 @@
gic: interrupt-controller@f0001000 { gic: interrupt-controller@f0001000 {
compatible = "arm,cortex-a9-gic"; compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>; #interrupt-cells = <3>;
#address-cells = <1>;
interrupt-controller; interrupt-controller;
reg = <0xf0001000 0x1000>, reg = <0xf0001000 0x1000>,
<0xf0000100 0x100>; <0xf0000100 0x100>;

10
arch/arm/boot/dts/stih415-pinctrl.dtsi
View File

@ -49,7 +49,7 @@
reg = <0xfe61f080 0x4>; reg = <0xfe61f080 0x4>;
reg-names = "irqmux"; reg-names = "irqmux";
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux"; interrupt-names = "irqmux";
ranges = <0 0xfe610000 0x5000>; ranges = <0 0xfe610000 0x5000>;
PIO0: gpio@fe610000 { PIO0: gpio@fe610000 {
@ -187,7 +187,7 @@
reg = <0xfee0f080 0x4>; reg = <0xfee0f080 0x4>;
reg-names = "irqmux"; reg-names = "irqmux";
interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux"; interrupt-names = "irqmux";
ranges = <0 0xfee00000 0x8000>; ranges = <0 0xfee00000 0x8000>;
PIO5: gpio@fee00000 { PIO5: gpio@fee00000 {
@ -282,7 +282,7 @@
reg = <0xfe82f080 0x4>; reg = <0xfe82f080 0x4>;
reg-names = "irqmux"; reg-names = "irqmux";
interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux"; interrupt-names = "irqmux";
ranges = <0 0xfe820000 0x8000>; ranges = <0 0xfe820000 0x8000>;
PIO13: gpio@fe820000 { PIO13: gpio@fe820000 {
@ -423,7 +423,7 @@
reg = <0xfd6bf080 0x4>; reg = <0xfd6bf080 0x4>;
reg-names = "irqmux"; reg-names = "irqmux";
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux"; interrupt-names = "irqmux";
ranges = <0 0xfd6b0000 0x3000>; ranges = <0 0xfd6b0000 0x3000>;
PIO100: gpio@fd6b0000 { PIO100: gpio@fd6b0000 {
@ -460,7 +460,7 @@
reg = <0xfd33f080 0x4>; reg = <0xfd33f080 0x4>;
reg-names = "irqmux"; reg-names = "irqmux";
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux"; interrupt-names = "irqmux";
ranges = <0 0xfd330000 0x5000>; ranges = <0 0xfd330000 0x5000>;
PIO103: gpio@fd330000 { PIO103: gpio@fd330000 {

10
arch/arm/boot/dts/stih416-pinctrl.dtsi
View File

@ -53,7 +53,7 @@
reg = <0xfe61f080 0x4>; reg = <0xfe61f080 0x4>;
reg-names = "irqmux"; reg-names = "irqmux";
interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux"; interrupt-names = "irqmux";
ranges = <0 0xfe610000 0x6000>; ranges = <0 0xfe610000 0x6000>;
PIO0: gpio@fe610000 { PIO0: gpio@fe610000 {
@ -201,7 +201,7 @@
reg = <0xfee0f080 0x4>; reg = <0xfee0f080 0x4>;
reg-names = "irqmux"; reg-names = "irqmux";
interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux"; interrupt-names = "irqmux";
ranges = <0 0xfee00000 0x10000>; ranges = <0 0xfee00000 0x10000>;
PIO5: gpio@fee00000 { PIO5: gpio@fee00000 {
@ -333,7 +333,7 @@
reg = <0xfe82f080 0x4>; reg = <0xfe82f080 0x4>;
reg-names = "irqmux"; reg-names = "irqmux";
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux"; interrupt-names = "irqmux";
ranges = <0 0xfe820000 0x6000>; ranges = <0 0xfe820000 0x6000>;
PIO13: gpio@fe820000 { PIO13: gpio@fe820000 {
@ -461,7 +461,7 @@
reg = <0xfd6bf080 0x4>; reg = <0xfd6bf080 0x4>;
reg-names = "irqmux"; reg-names = "irqmux";
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux"; interrupt-names = "irqmux";
ranges = <0 0xfd6b0000 0x3000>; ranges = <0 0xfd6b0000 0x3000>;
PIO100: gpio@fd6b0000 { PIO100: gpio@fd6b0000 {
@ -498,7 +498,7 @@
reg = <0xfd33f080 0x4>; reg = <0xfd33f080 0x4>;
reg-names = "irqmux"; reg-names = "irqmux";
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
interrupts-names = "irqmux"; interrupt-names = "irqmux";
ranges = <0 0xfd330000 0x5000>; ranges = <0 0xfd330000 0x5000>;
PIO103: gpio@fd330000 { PIO103: gpio@fd330000 {

13
arch/arm/boot/dts/tegra124.dtsi
View File

@ -233,19 +233,6 @@
status = "disabled"; status = "disabled";
}; };
serial@0,70006400 {
compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
reg = <0x0 0x70006400 0x0 0x40>;
reg-shift = <2>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTE>;
resets = <&tegra_car 66>;
reset-names = "serial";
dmas = <&apbdma 20>, <&apbdma 20>;
dma-names = "rx", "tx";
status = "disabled";
};
pwm@0,7000a000 { pwm@0,7000a000 {
compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm"; compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
reg = <0x0 0x7000a000 0x0 0x100>; reg = <0x0 0x7000a000 0x0 0x100>;

2
arch/arm/boot/dts/vf610-twr.dts
View File

@ -25,11 +25,13 @@
clocks { clocks {
audio_ext { audio_ext {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>; clock-frequency = <24576000>;
}; };
enet_ext { enet_ext {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>; clock-frequency = <50000000>;
}; };
}; };

4
arch/arm/boot/dts/vf610.dtsi
View File

@ -45,11 +45,13 @@
sxosc { sxosc {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>; clock-frequency = <32768>;
}; };
fxosc { fxosc {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>; clock-frequency = <24000000>;
}; };
}; };
@ -72,8 +74,6 @@
intc: interrupt-controller@40002000 { intc: interrupt-controller@40002000 {
compatible = "arm,cortex-a9-gic"; compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>; #interrupt-cells = <3>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller; interrupt-controller;
reg = <0x40003000 0x1000>, reg = <0x40003000 0x1000>,
<0x40002100 0x100>; <0x40002100 0x100>;

23
arch/arm/boot/dts/zynq-7000.dtsi
View File

@ -24,6 +24,7 @@
device_type = "cpu"; device_type = "cpu";
reg = <0>; reg = <0>;
clocks = <&clkc 3>; clocks = <&clkc 3>;
clock-latency = <1000>;
operating-points = < operating-points = <
/* kHz uV */ /* kHz uV */
666667 1000000 666667 1000000
@ -54,6 +55,28 @@
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
ranges; ranges;
i2c0: zynq-i2c@e0004000 {
compatible = "cdns,i2c-r1p10";
status = "disabled";
clocks = <&clkc 38>;
interrupt-parent = <&intc>;
interrupts = <0 25 4>;
reg = <0xe0004000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c1: zynq-i2c@e0005000 {
compatible = "cdns,i2c-r1p10";
status = "disabled";
clocks = <&clkc 39>;
interrupt-parent = <&intc>;
interrupts = <0 48 4>;
reg = <0xe0005000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
};
intc: interrupt-controller@f8f01000 { intc: interrupt-controller@f8f01000 {
compatible = "arm,cortex-a9-gic"; compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>; #interrupt-cells = <3>;

76
arch/arm/boot/dts/zynq-zc702.dts
View File

@ -34,6 +34,82 @@
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&i2c0 {
status = "okay";
clock-frequency = <400000>;
i2cswitch@74 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x74>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
si570: clock-generator@5d {
#clock-cells = <0>;
compatible = "silabs,si570";
temperature-stability = <50>;
reg = <0x5d>;
factory-fout = <156250000>;
clock-frequency = <148500000>;
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
eeprom@54 {
compatible = "at,24c08";
reg = <0x54>;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
hwmon@52 {
compatible = "ti,ucd9248";
reg = <52>;
};
hwmon@53 {
compatible = "ti,ucd9248";
reg = <53>;
};
hwmon@54 {
compatible = "ti,ucd9248";
reg = <54>;
};
};
};
};
&sdhci0 { &sdhci0 {
status = "okay"; status = "okay";
}; };

68
arch/arm/boot/dts/zynq-zc706.dts
View File

@ -35,6 +35,74 @@
phy-mode = "rgmii"; phy-mode = "rgmii";
}; };
&i2c0 {
status = "okay";
clock-frequency = <400000>;
i2cswitch@74 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x74>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
si570: clock-generator@5d {
#clock-cells = <0>;
compatible = "silabs,si570";
temperature-stability = <50>;
reg = <0x5d>;
factory-fout = <156250000>;
clock-frequency = <148500000>;
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
eeprom@54 {
compatible = "at,24c08";
reg = <0x54>;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
ucd90120@65 {
compatible = "ti,ucd90120";
reg = <0x65>;
};
};
};
};
&sdhci0 { &sdhci0 {
status = "okay"; status = "okay";
}; };

6
arch/arm/common/bL_switcher.c
View File

@ -797,10 +797,8 @@ static int __init bL_switcher_init(void)
{ {
int ret; int ret;
if (MAX_NR_CLUSTERS != 2) { if (!mcpm_is_available())
pr_err("%s: only dual cluster systems are supported\n", __func__); return -ENODEV;
return -EINVAL;
}
cpu_notifier(bL_switcher_hotplug_callback, 0); cpu_notifier(bL_switcher_hotplug_callback, 0);

5
arch/arm/common/mcpm_entry.c
View File

@ -48,6 +48,11 @@ int __init mcpm_platform_register(const struct mcpm_platform_ops *ops)
return 0; return 0;
} }
bool mcpm_is_available(void)
{
return (platform_ops) ? true : false;
}
int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster) int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster)
{ {
if (!platform_ops) if (!platform_ops)

2
arch/arm/configs/omap2plus_defconfig
View File

@ -226,7 +226,7 @@ CONFIG_USB_DWC3=m
CONFIG_USB_TEST=y CONFIG_USB_TEST=y
CONFIG_NOP_USB_XCEIV=y CONFIG_NOP_USB_XCEIV=y
CONFIG_OMAP_USB2=y CONFIG_OMAP_USB2=y
CONFIG_OMAP_USB3=y CONFIG_TI_PIPE3=y
CONFIG_AM335X_PHY_USB=y CONFIG_AM335X_PHY_USB=y
CONFIG_USB_GADGET=y CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG=y CONFIG_USB_GADGET_DEBUG=y

4
arch/arm/configs/u300_defconfig
View File

@ -11,6 +11,7 @@ CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_UNLOAD=y
# CONFIG_LBDAF is not set # CONFIG_LBDAF is not set
# CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
# CONFIG_IOSCHED_CFQ is not set # CONFIG_IOSCHED_CFQ is not set
# CONFIG_ARCH_MULTI_V7 is not set # CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_U300=y CONFIG_ARCH_U300=y
@ -21,7 +22,6 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072" CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072"
CONFIG_CPU_IDLE=y CONFIG_CPU_IDLE=y
CONFIG_FPE_NWFPE=y
# CONFIG_SUSPEND is not set # CONFIG_SUSPEND is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_PREVENT_FIRMWARE_BUILD is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set
@ -64,8 +64,8 @@ CONFIG_TMPFS=y
CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_FS=y CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set # CONFIG_SCHED_DEBUG is not set
CONFIG_TIMER_STATS=y CONFIG_TIMER_STATS=y
# CONFIG_DEBUG_PREEMPT is not set # CONFIG_DEBUG_PREEMPT is not set
CONFIG_DEBUG_INFO=y

24
arch/arm/configs/u8500_defconfig
View File

@ -1,16 +1,16 @@
# CONFIG_SWAP is not set # CONFIG_SWAP is not set
CONFIG_SYSVIPC=y CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y CONFIG_HIGH_RES_TIMERS=y
CONFIG_BLK_DEV_INITRD=y CONFIG_BLK_DEV_INITRD=y
CONFIG_KALLSYMS_ALL=y CONFIG_KALLSYMS_ALL=y
CONFIG_MODULES=y CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_U8500=y CONFIG_ARCH_U8500=y
CONFIG_MACH_HREFV60=y CONFIG_MACH_HREFV60=y
CONFIG_MACH_SNOWBALL=y CONFIG_MACH_SNOWBALL=y
CONFIG_MACH_UX500_DT=y
CONFIG_SMP=y CONFIG_SMP=y
CONFIG_NR_CPUS=2 CONFIG_NR_CPUS=2
CONFIG_PREEMPT=y CONFIG_PREEMPT=y
@ -34,16 +34,22 @@ CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_DHCP=y
CONFIG_NETFILTER=y CONFIG_NETFILTER=y
CONFIG_PHONET=y CONFIG_PHONET=y
# CONFIG_WIRELESS is not set CONFIG_CFG80211=y
CONFIG_CFG80211_DEBUGFS=y
CONFIG_MAC80211=y
CONFIG_MAC80211_LEDS=y
CONFIG_CAIF=y CONFIG_CAIF=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=65536 CONFIG_BLK_DEV_RAM_SIZE=65536
CONFIG_SENSORS_BH1780=y CONFIG_SENSORS_BH1780=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_SMSC911X=y CONFIG_SMSC911X=y
CONFIG_SMSC_PHY=y CONFIG_SMSC_PHY=y
# CONFIG_WLAN is not set CONFIG_CW1200=y
CONFIG_CW1200_WLAN_SDIO=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set # CONFIG_KEYBOARD_ATKBD is not set
@ -85,15 +91,12 @@ CONFIG_AB8500_USB=y
CONFIG_USB_GADGET=y CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m CONFIG_USB_ETH=m
CONFIG_MMC=y CONFIG_MMC=y
CONFIG_MMC_UNSAFE_RESUME=y
# CONFIG_MMC_BLOCK_BOUNCE is not set
CONFIG_MMC_ARMMMCI=y CONFIG_MMC_ARMMMCI=y
CONFIG_NEW_LEDS=y CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y CONFIG_LEDS_CLASS=y
CONFIG_LEDS_LM3530=y CONFIG_LEDS_LM3530=y
CONFIG_LEDS_GPIO=y CONFIG_LEDS_GPIO=y
CONFIG_LEDS_LP5521=y CONFIG_LEDS_LP5521=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AB8500=y CONFIG_RTC_DRV_AB8500=y
@ -103,6 +106,11 @@ CONFIG_STE_DMA40=y
CONFIG_STAGING=y CONFIG_STAGING=y
CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
CONFIG_HSEM_U8500=y CONFIG_HSEM_U8500=y
CONFIG_IIO=y
CONFIG_IIO_ST_ACCEL_3AXIS=y
CONFIG_IIO_ST_GYRO_3AXIS=y
CONFIG_IIO_ST_MAGN_3AXIS=y
CONFIG_IIO_ST_PRESS=y
CONFIG_EXT2_FS=y CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y CONFIG_EXT2_FS_POSIX_ACL=y
@ -110,8 +118,6 @@ CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT3_FS=y CONFIG_EXT3_FS=y
CONFIG_EXT4_FS=y CONFIG_EXT4_FS=y
CONFIG_VFAT_FS=y CONFIG_VFAT_FS=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_TMPFS=y CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y CONFIG_TMPFS_POSIX_ACL=y
# CONFIG_MISC_FILESYSTEMS is not set # CONFIG_MISC_FILESYSTEMS is not set

14
arch/arm/include/asm/cputype.h
View File

@ -222,22 +222,22 @@ static inline int cpu_is_xsc3(void)
#endif #endif
/* /*
* Marvell's PJ4 core is based on V7 version. It has some modification * Marvell's PJ4 and PJ4B cores are based on V7 version,
* for coprocessor setting. For this reason, we need a way to distinguish * but require a specical sequence for enabling coprocessors.
* it. * For this reason, we need a way to distinguish them.
*/ */
#ifndef CONFIG_CPU_PJ4 #if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B)
#define cpu_is_pj4() 0
#else
static inline int cpu_is_pj4(void) static inline int cpu_is_pj4(void)
{ {
unsigned int id; unsigned int id;
id = read_cpuid_id(); id = read_cpuid_id();
if ((id & 0xfffffff0) == 0x562f5840) if ((id & 0xff0fff00) == 0x560f5800)
return 1; return 1;
return 0; return 0;
} }
#else
#define cpu_is_pj4() 0
#endif #endif
#endif #endif

2
arch/arm/include/asm/div64.h
View File

@ -156,7 +156,7 @@
/* Select the best insn combination to perform the */ \ /* Select the best insn combination to perform the */ \
/* actual __m * __n / (__p << 64) operation. */ \ /* actual __m * __n / (__p << 64) operation. */ \
if (!__c) { \ if (!__c) { \
asm ( "umull %Q0, %R0, %1, %Q2\n\t" \ asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \
"mov %Q0, #0" \ "mov %Q0, #0" \
: "=&r" (__res) \ : "=&r" (__res) \
: "r" (__m), "r" (__n) \ : "r" (__m), "r" (__n) \

7
arch/arm/include/asm/mcpm.h
View File

@ -53,6 +53,13 @@ void mcpm_set_early_poke(unsigned cpu, unsigned cluster,
* CPU/cluster power operations API for higher subsystems to use. * CPU/cluster power operations API for higher subsystems to use.
*/ */
/**
* mcpm_is_available - returns whether MCPM is initialized and available
*
* This returns true or false accordingly.
*/
bool mcpm_is_available(void);
/** /**
* mcpm_cpu_power_up - make given CPU in given cluster runable * mcpm_cpu_power_up - make given CPU in given cluster runable
* *

12
arch/arm/include/asm/tlb.h
View File

@ -98,15 +98,25 @@ static inline void __tlb_alloc_page(struct mmu_gather *tlb)
} }
} }
static inline void tlb_flush_mmu(struct mmu_gather *tlb) static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
{ {
tlb_flush(tlb); tlb_flush(tlb);
}
static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
{
free_pages_and_swap_cache(tlb->pages, tlb->nr); free_pages_and_swap_cache(tlb->pages, tlb->nr);
tlb->nr = 0; tlb->nr = 0;
if (tlb->pages == tlb->local) if (tlb->pages == tlb->local)
__tlb_alloc_page(tlb); __tlb_alloc_page(tlb);
} }
static inline void tlb_flush_mmu(struct mmu_gather *tlb)
{
tlb_flush_mmu_tlbonly(tlb);
tlb_flush_mmu_free(tlb);
}
static inline void static inline void
tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end) tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end)
{ {

1
arch/arm/include/uapi/asm/unistd.h
View File

@ -408,6 +408,7 @@
#define __NR_finit_module (__NR_SYSCALL_BASE+379) #define __NR_finit_module (__NR_SYSCALL_BASE+379)
#define __NR_sched_setattr (__NR_SYSCALL_BASE+380) #define __NR_sched_setattr (__NR_SYSCALL_BASE+380)
#define __NR_sched_getattr (__NR_SYSCALL_BASE+381) #define __NR_sched_getattr (__NR_SYSCALL_BASE+381)
#define __NR_renameat2 (__NR_SYSCALL_BASE+382)
/* /*
* This may need to be greater than __NR_last_syscall+1 in order to * This may need to be greater than __NR_last_syscall+1 in order to

1
arch/arm/kernel/Makefile
View File

@ -79,6 +79,7 @@ obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o
obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o
obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o
obj-$(CONFIG_CPU_PJ4B) += pj4-cp0.o
obj-$(CONFIG_IWMMXT) += iwmmxt.o obj-$(CONFIG_IWMMXT) += iwmmxt.o
obj-$(CONFIG_PERF_EVENTS) += perf_regs.o obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o perf_event_cpu.o obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o perf_event_cpu.o

1
arch/arm/kernel/calls.S
View File

@ -391,6 +391,7 @@
CALL(sys_finit_module) CALL(sys_finit_module)
/* 380 */ CALL(sys_sched_setattr) /* 380 */ CALL(sys_sched_setattr)
CALL(sys_sched_getattr) CALL(sys_sched_getattr)
CALL(sys_renameat2)
#ifndef syscalls_counted #ifndef syscalls_counted
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
#define syscalls_counted #define syscalls_counted

2
arch/arm/kernel/head.S
View File

@ -587,7 +587,7 @@ __fixup_pv_table:
add r6, r6, r3 @ adjust __pv_phys_pfn_offset address add r6, r6, r3 @ adjust __pv_phys_pfn_offset address
add r7, r7, r3 @ adjust __pv_offset address add r7, r7, r3 @ adjust __pv_offset address
mov r0, r8, lsr #12 @ convert to PFN mov r0, r8, lsr #12 @ convert to PFN
str r0, [r6, #LOW_OFFSET] @ save computed PHYS_OFFSET to __pv_phys_pfn_offset str r0, [r6] @ save computed PHYS_OFFSET to __pv_phys_pfn_offset
strcc ip, [r7, #HIGH_OFFSET] @ save to __pv_offset high bits strcc ip, [r7, #HIGH_OFFSET] @ save to __pv_offset high bits
mov r6, r3, lsr #24 @ constant for add/sub instructions mov r6, r3, lsr #24 @ constant for add/sub instructions
teq r3, r6, lsl #24 @ must be 16MiB aligned teq r3, r6, lsl #24 @ must be 16MiB aligned

8
arch/arm/kernel/iwmmxt.S
View File

@ -19,12 +19,16 @@
#include <asm/thread_info.h> #include <asm/thread_info.h>
#include <asm/asm-offsets.h> #include <asm/asm-offsets.h>
#if defined(CONFIG_CPU_PJ4) #if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B)
#define PJ4(code...) code #define PJ4(code...) code
#define XSC(code...) #define XSC(code...)
#else #elif defined(CONFIG_CPU_MOHAWK) || \
defined(CONFIG_CPU_XSC3) || \
defined(CONFIG_CPU_XSCALE)
#define PJ4(code...) #define PJ4(code...)
#define XSC(code...) code #define XSC(code...) code
#else
#error "Unsupported iWMMXt architecture"
#endif #endif
#define MMX_WR0 (0x00) #define MMX_WR0 (0x00)

7
arch/arm/kernel/machine_kexec.c
View File

@ -184,3 +184,10 @@ void machine_kexec(struct kimage *image)
soft_restart(reboot_entry_phys); soft_restart(reboot_entry_phys);
} }
void arch_crash_save_vmcoreinfo(void)
{
#ifdef CONFIG_ARM_LPAE
VMCOREINFO_CONFIG(ARM_LPAE);
#endif
}

42
arch/arm/kernel/pj4-cp0.c
View File

@ -45,7 +45,7 @@ static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
return NOTIFY_DONE; return NOTIFY_DONE;
} }
static struct notifier_block iwmmxt_notifier_block = { static struct notifier_block __maybe_unused iwmmxt_notifier_block = {
.notifier_call = iwmmxt_do, .notifier_call = iwmmxt_do,
}; };
@ -72,6 +72,33 @@ static void __init pj4_cp_access_write(u32 value)
: "=r" (temp) : "r" (value)); : "=r" (temp) : "r" (value));
} }
static int __init pj4_get_iwmmxt_version(void)
{
u32 cp_access, wcid;
cp_access = pj4_cp_access_read();
pj4_cp_access_write(cp_access | 0xf);
/* check if coprocessor 0 and 1 are available */
if ((pj4_cp_access_read() & 0xf) != 0xf) {
pj4_cp_access_write(cp_access);
return -ENODEV;
}
/* read iWMMXt coprocessor id register p1, c0 */
__asm__ __volatile__ ("mrc p1, 0, %0, c0, c0, 0\n" : "=r" (wcid));
pj4_cp_access_write(cp_access);
/* iWMMXt v1 */
if ((wcid & 0xffffff00) == 0x56051000)
return 1;
/* iWMMXt v2 */
if ((wcid & 0xffffff00) == 0x56052000)
return 2;
return -EINVAL;
}
/* /*
* Disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy * Disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
@ -79,17 +106,26 @@ static void __init pj4_cp_access_write(u32 value)
*/ */
static int __init pj4_cp0_init(void) static int __init pj4_cp0_init(void)
{ {
u32 cp_access; u32 __maybe_unused cp_access;
int vers;
if (!cpu_is_pj4()) if (!cpu_is_pj4())
return 0; return 0;
vers = pj4_get_iwmmxt_version();
if (vers < 0)
return 0;
#ifndef CONFIG_IWMMXT
pr_info("PJ4 iWMMXt coprocessor detected, but kernel support is missing.\n");
#else
cp_access = pj4_cp_access_read() & ~0xf; cp_access = pj4_cp_access_read() & ~0xf;
pj4_cp_access_write(cp_access); pj4_cp_access_write(cp_access);
printk(KERN_INFO "PJ4 iWMMXt coprocessor enabled.\n"); pr_info("PJ4 iWMMXt v%d coprocessor enabled.\n", vers);
elf_hwcap |= HWCAP_IWMMXT; elf_hwcap |= HWCAP_IWMMXT;
thread_register_notifier(&iwmmxt_notifier_block); thread_register_notifier(&iwmmxt_notifier_block);
#endif
return 0; return 0;
} }

6
arch/arm/kernel/sys_oabi-compat.c
View File

@ -203,9 +203,9 @@ asmlinkage long sys_oabi_fcntl64(unsigned int fd, unsigned int cmd,
int ret; int ret;
switch (cmd) { switch (cmd) {
case F_GETLKP: case F_OFD_GETLK:
case F_SETLKP: case F_OFD_SETLK:
case F_SETLKPW: case F_OFD_SETLKW:
case F_GETLK64: case F_GETLK64:
case F_SETLK64: case F_SETLK64:
case F_SETLKW64: case F_SETLKW64:

2
arch/arm/kvm/Kconfig
View File

@ -23,7 +23,7 @@ config KVM
select HAVE_KVM_CPU_RELAX_INTERCEPT select HAVE_KVM_CPU_RELAX_INTERCEPT
select KVM_MMIO select KVM_MMIO
select KVM_ARM_HOST select KVM_ARM_HOST
depends on ARM_VIRT_EXT && ARM_LPAE depends on ARM_VIRT_EXT && ARM_LPAE && !CPU_BIG_ENDIAN
---help--- ---help---
Support hosting virtualized guest machines. You will also Support hosting virtualized guest machines. You will also
need to select one or more of the processor modules below. need to select one or more of the processor modules below.

15
arch/arm/kvm/mmu.c
View File

@ -42,6 +42,8 @@ static unsigned long hyp_idmap_start;
static unsigned long hyp_idmap_end; static unsigned long hyp_idmap_end;
static phys_addr_t hyp_idmap_vector; static phys_addr_t hyp_idmap_vector;
#define pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
#define kvm_pmd_huge(_x) (pmd_huge(_x) || pmd_trans_huge(_x)) #define kvm_pmd_huge(_x) (pmd_huge(_x) || pmd_trans_huge(_x))
static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
@ -293,14 +295,14 @@ void free_boot_hyp_pgd(void)
if (boot_hyp_pgd) { if (boot_hyp_pgd) {
unmap_range(NULL, boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE); unmap_range(NULL, boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE);
unmap_range(NULL, boot_hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE); unmap_range(NULL, boot_hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
kfree(boot_hyp_pgd); free_pages((unsigned long)boot_hyp_pgd, pgd_order);
boot_hyp_pgd = NULL; boot_hyp_pgd = NULL;
} }
if (hyp_pgd) if (hyp_pgd)
unmap_range(NULL, hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE); unmap_range(NULL, hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
kfree(init_bounce_page); free_page((unsigned long)init_bounce_page);
init_bounce_page = NULL; init_bounce_page = NULL;
mutex_unlock(&kvm_hyp_pgd_mutex); mutex_unlock(&kvm_hyp_pgd_mutex);
@ -330,7 +332,7 @@ void free_hyp_pgds(void)
for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE) for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE)
unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE); unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE);
kfree(hyp_pgd); free_pages((unsigned long)hyp_pgd, pgd_order);
hyp_pgd = NULL; hyp_pgd = NULL;
} }
@ -1024,7 +1026,7 @@ int kvm_mmu_init(void)
size_t len = __hyp_idmap_text_end - __hyp_idmap_text_start; size_t len = __hyp_idmap_text_end - __hyp_idmap_text_start;
phys_addr_t phys_base; phys_addr_t phys_base;
init_bounce_page = kmalloc(PAGE_SIZE, GFP_KERNEL); init_bounce_page = (void *)__get_free_page(GFP_KERNEL);
if (!init_bounce_page) { if (!init_bounce_page) {
kvm_err("Couldn't allocate HYP init bounce page\n"); kvm_err("Couldn't allocate HYP init bounce page\n");
err = -ENOMEM; err = -ENOMEM;
@ -1050,8 +1052,9 @@ int kvm_mmu_init(void)
(unsigned long)phys_base); (unsigned long)phys_base);
} }
hyp_pgd = kzalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL); hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, pgd_order);
boot_hyp_pgd = kzalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL); boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, pgd_order);
if (!hyp_pgd || !boot_hyp_pgd) { if (!hyp_pgd || !boot_hyp_pgd) {
kvm_err("Hyp mode PGD not allocated\n"); kvm_err("Hyp mode PGD not allocated\n");
err = -ENOMEM; err = -ENOMEM;

2
arch/arm/mach-at91/at91sam9260_devices.c
View File

@ -1296,7 +1296,7 @@ static struct resource adc_resources[] = {
}; };
static struct platform_device at91_adc_device = { static struct platform_device at91_adc_device = {
.name = "at91_adc", .name = "at91sam9260-adc",
.id = -1, .id = -1,
.dev = { .dev = {
.platform_data = &adc_data, .platform_data = &adc_data,

2
arch/arm/mach-at91/at91sam9g45_devices.c
View File

@ -1204,7 +1204,7 @@ static struct resource adc_resources[] = {
}; };
static struct platform_device at91_adc_device = { static struct platform_device at91_adc_device = {
.name = "at91_adc", .name = "at91sam9g45-adc",
.id = -1, .id = -1,
.dev = { .dev = {
.platform_data = &adc_data, .platform_data = &adc_data,

29
arch/arm/mach-imx/clk-imx6q.c
View File

@ -208,8 +208,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
* the "output_enable" bit as a gate, even though it's really just * the "output_enable" bit as a gate, even though it's really just
* enabling clock output. * enabling clock output.
*/ */
clk[lvds1_gate] = imx_clk_gate("lvds1_gate", "dummy", base + 0x160, 10); clk[lvds1_gate] = imx_clk_gate("lvds1_gate", "lvds1_sel", base + 0x160, 10);
clk[lvds2_gate] = imx_clk_gate("lvds2_gate", "dummy", base + 0x160, 11); clk[lvds2_gate] = imx_clk_gate("lvds2_gate", "lvds2_sel", base + 0x160, 11);
/* name parent_name reg idx */ /* name parent_name reg idx */
clk[pll2_pfd0_352m] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0); clk[pll2_pfd0_352m] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0);
@ -258,14 +258,14 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
clk[ipu2_sel] = imx_clk_mux("ipu2_sel", base + 0x3c, 14, 2, ipu_sels, ARRAY_SIZE(ipu_sels)); clk[ipu2_sel] = imx_clk_mux("ipu2_sel", base + 0x3c, 14, 2, ipu_sels, ARRAY_SIZE(ipu_sels));
clk[ldb_di0_sel] = imx_clk_mux_flags("ldb_di0_sel", base + 0x2c, 9, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT); clk[ldb_di0_sel] = imx_clk_mux_flags("ldb_di0_sel", base + 0x2c, 9, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT);
clk[ldb_di1_sel] = imx_clk_mux_flags("ldb_di1_sel", base + 0x2c, 12, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT); clk[ldb_di1_sel] = imx_clk_mux_flags("ldb_di1_sel", base + 0x2c, 12, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT);
clk[ipu1_di0_pre_sel] = imx_clk_mux("ipu1_di0_pre_sel", base + 0x34, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); clk[ipu1_di0_pre_sel] = imx_clk_mux_flags("ipu1_di0_pre_sel", base + 0x34, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
clk[ipu1_di1_pre_sel] = imx_clk_mux("ipu1_di1_pre_sel", base + 0x34, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); clk[ipu1_di1_pre_sel] = imx_clk_mux_flags("ipu1_di1_pre_sel", base + 0x34, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
clk[ipu2_di0_pre_sel] = imx_clk_mux("ipu2_di0_pre_sel", base + 0x38, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); clk[ipu2_di0_pre_sel] = imx_clk_mux_flags("ipu2_di0_pre_sel", base + 0x38, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
clk[ipu2_di1_pre_sel] = imx_clk_mux("ipu2_di1_pre_sel", base + 0x38, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); clk[ipu2_di1_pre_sel] = imx_clk_mux_flags("ipu2_di1_pre_sel", base + 0x38, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
clk[ipu1_di0_sel] = imx_clk_mux("ipu1_di0_sel", base + 0x34, 0, 3, ipu1_di0_sels, ARRAY_SIZE(ipu1_di0_sels)); clk[ipu1_di0_sel] = imx_clk_mux_flags("ipu1_di0_sel", base + 0x34, 0, 3, ipu1_di0_sels, ARRAY_SIZE(ipu1_di0_sels), CLK_SET_RATE_PARENT);
clk[ipu1_di1_sel] = imx_clk_mux("ipu1_di1_sel", base + 0x34, 9, 3, ipu1_di1_sels, ARRAY_SIZE(ipu1_di1_sels)); clk[ipu1_di1_sel] = imx_clk_mux_flags("ipu1_di1_sel", base + 0x34, 9, 3, ipu1_di1_sels, ARRAY_SIZE(ipu1_di1_sels), CLK_SET_RATE_PARENT);
clk[ipu2_di0_sel] = imx_clk_mux("ipu2_di0_sel", base + 0x38, 0, 3, ipu2_di0_sels, ARRAY_SIZE(ipu2_di0_sels)); clk[ipu2_di0_sel] = imx_clk_mux_flags("ipu2_di0_sel", base + 0x38, 0, 3, ipu2_di0_sels, ARRAY_SIZE(ipu2_di0_sels), CLK_SET_RATE_PARENT);
clk[ipu2_di1_sel] = imx_clk_mux("ipu2_di1_sel", base + 0x38, 9, 3, ipu2_di1_sels, ARRAY_SIZE(ipu2_di1_sels)); clk[ipu2_di1_sel] = imx_clk_mux_flags("ipu2_di1_sel", base + 0x38, 9, 3, ipu2_di1_sels, ARRAY_SIZE(ipu2_di1_sels), CLK_SET_RATE_PARENT);
clk[hsi_tx_sel] = imx_clk_mux("hsi_tx_sel", base + 0x30, 28, 1, hsi_tx_sels, ARRAY_SIZE(hsi_tx_sels)); clk[hsi_tx_sel] = imx_clk_mux("hsi_tx_sel", base + 0x30, 28, 1, hsi_tx_sels, ARRAY_SIZE(hsi_tx_sels));
clk[pcie_axi_sel] = imx_clk_mux("pcie_axi_sel", base + 0x18, 10, 1, pcie_axi_sels, ARRAY_SIZE(pcie_axi_sels)); clk[pcie_axi_sel] = imx_clk_mux("pcie_axi_sel", base + 0x18, 10, 1, pcie_axi_sels, ARRAY_SIZE(pcie_axi_sels));
clk[ssi1_sel] = imx_clk_fixup_mux("ssi1_sel", base + 0x1c, 10, 2, ssi_sels, ARRAY_SIZE(ssi_sels), imx_cscmr1_fixup); clk[ssi1_sel] = imx_clk_fixup_mux("ssi1_sel", base + 0x1c, 10, 2, ssi_sels, ARRAY_SIZE(ssi_sels), imx_cscmr1_fixup);
@ -445,6 +445,15 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]); clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]);
} }
clk_set_parent(clk[ipu1_di0_pre_sel], clk[pll5_video_div]);
clk_set_parent(clk[ipu1_di1_pre_sel], clk[pll5_video_div]);
clk_set_parent(clk[ipu2_di0_pre_sel], clk[pll5_video_div]);
clk_set_parent(clk[ipu2_di1_pre_sel], clk[pll5_video_div]);
clk_set_parent(clk[ipu1_di0_sel], clk[ipu1_di0_pre]);
clk_set_parent(clk[ipu1_di1_sel], clk[ipu1_di1_pre]);
clk_set_parent(clk[ipu2_di0_sel], clk[ipu2_di0_pre]);
clk_set_parent(clk[ipu2_di1_sel], clk[ipu2_di1_pre]);
/* /*
* The gpmi needs 100MHz frequency in the EDO/Sync mode, * The gpmi needs 100MHz frequency in the EDO/Sync mode,
* We can not get the 100MHz from the pll2_pfd0_352m. * We can not get the 100MHz from the pll2_pfd0_352m.

2
arch/arm/mach-omap2/board-rx51-video.c
View File

@ -48,7 +48,7 @@ static struct omap_dss_board_info rx51_dss_board_info = {
static int __init rx51_video_init(void) static int __init rx51_video_init(void)
{ {
if (!machine_is_nokia_rx51() && !of_machine_is_compatible("nokia,omap3-n900")) if (!machine_is_nokia_rx51())
return 0; return 0;
if (omap_mux_init_gpio(RX51_LCD_RESET_GPIO, OMAP_PIN_OUTPUT)) { if (omap_mux_init_gpio(RX51_LCD_RESET_GPIO, OMAP_PIN_OUTPUT)) {

4
arch/arm/mach-omap2/clkt_dpll.c
View File

@ -209,7 +209,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw)
if (v == OMAP3XXX_EN_DPLL_LPBYPASS || if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
v == OMAP3XXX_EN_DPLL_FRBYPASS) v == OMAP3XXX_EN_DPLL_FRBYPASS)
return 1; return 1;
} else if (soc_is_am33xx() || cpu_is_omap44xx()) { } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) {
if (v == OMAP4XXX_EN_DPLL_LPBYPASS || if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS ||
v == OMAP4XXX_EN_DPLL_MNBYPASS) v == OMAP4XXX_EN_DPLL_MNBYPASS)
@ -255,7 +255,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk)
if (v == OMAP3XXX_EN_DPLL_LPBYPASS || if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
v == OMAP3XXX_EN_DPLL_FRBYPASS) v == OMAP3XXX_EN_DPLL_FRBYPASS)
return __clk_get_rate(dd->clk_bypass); return __clk_get_rate(dd->clk_bypass);
} else if (soc_is_am33xx() || cpu_is_omap44xx()) { } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) {
if (v == OMAP4XXX_EN_DPLL_LPBYPASS || if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS ||
v == OMAP4XXX_EN_DPLL_MNBYPASS) v == OMAP4XXX_EN_DPLL_MNBYPASS)

15
arch/arm/mach-omap2/gpmc.c
View File

@ -501,7 +501,7 @@ static int gpmc_cs_delete_mem(int cs)
int r; int r;
spin_lock(&gpmc_mem_lock); spin_lock(&gpmc_mem_lock);
r = release_resource(&gpmc_cs_mem[cs]); r = release_resource(res);
res->start = 0; res->start = 0;
res->end = 0; res->end = 0;
spin_unlock(&gpmc_mem_lock); spin_unlock(&gpmc_mem_lock);
@ -527,6 +527,14 @@ static int gpmc_cs_remap(int cs, u32 base)
pr_err("%s: requested chip-select is disabled\n", __func__); pr_err("%s: requested chip-select is disabled\n", __func__);
return -ENODEV; return -ENODEV;
} }
/*
* Make sure we ignore any device offsets from the GPMC partition
* allocated for the chip select and that the new base confirms
* to the GPMC 16MB minimum granularity.
*/
base &= ~(SZ_16M - 1);
gpmc_cs_get_memconf(cs, &old_base, &size); gpmc_cs_get_memconf(cs, &old_base, &size);
if (base == old_base) if (base == old_base)
return 0; return 0;
@ -586,6 +594,8 @@ EXPORT_SYMBOL(gpmc_cs_request);
void gpmc_cs_free(int cs) void gpmc_cs_free(int cs)
{ {
struct resource *res = &gpmc_cs_mem[cs];
spin_lock(&gpmc_mem_lock); spin_lock(&gpmc_mem_lock);
if (cs >= gpmc_cs_num || cs < 0 || !gpmc_cs_reserved(cs)) { if (cs >= gpmc_cs_num || cs < 0 || !gpmc_cs_reserved(cs)) {
printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs); printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs);
@ -594,7 +604,8 @@ void gpmc_cs_free(int cs)
return; return;
} }
gpmc_cs_disable_mem(cs); gpmc_cs_disable_mem(cs);
release_resource(&gpmc_cs_mem[cs]); if (res->flags)
release_resource(res);
gpmc_cs_set_reserved(cs, 0); gpmc_cs_set_reserved(cs, 0);
spin_unlock(&gpmc_mem_lock); spin_unlock(&gpmc_mem_lock);
} }

3
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -2546,11 +2546,12 @@ static int __init _init(struct omap_hwmod *oh, void *data)
return -EINVAL; return -EINVAL;
} }
if (np) if (np) {
if (of_find_property(np, "ti,no-reset-on-init", NULL)) if (of_find_property(np, "ti,no-reset-on-init", NULL))
oh->flags |= HWMOD_INIT_NO_RESET; oh->flags |= HWMOD_INIT_NO_RESET;
if (of_find_property(np, "ti,no-idle-on-init", NULL)) if (of_find_property(np, "ti,no-idle-on-init", NULL))
oh->flags |= HWMOD_INIT_NO_IDLE; oh->flags |= HWMOD_INIT_NO_IDLE;
}
oh->_state = _HWMOD_STATE_INITIALIZED; oh->_state = _HWMOD_STATE_INITIALIZED;

4
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
View File

@ -1964,7 +1964,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = {
static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = { static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
.name = "usb_host_hs", .name = "usb_host_hs",
.class = &omap3xxx_usb_host_hs_hwmod_class, .class = &omap3xxx_usb_host_hs_hwmod_class,
.clkdm_name = "l3_init_clkdm", .clkdm_name = "usbhost_clkdm",
.mpu_irqs = omap3xxx_usb_host_hs_irqs, .mpu_irqs = omap3xxx_usb_host_hs_irqs,
.main_clk = "usbhost_48m_fck", .main_clk = "usbhost_48m_fck",
.prcm = { .prcm = {
@ -2047,7 +2047,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = {
static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = { static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
.name = "usb_tll_hs", .name = "usb_tll_hs",
.class = &omap3xxx_usb_tll_hs_hwmod_class, .class = &omap3xxx_usb_tll_hs_hwmod_class,
.clkdm_name = "l3_init_clkdm", .clkdm_name = "core_l4_clkdm",
.mpu_irqs = omap3xxx_usb_tll_hs_irqs, .mpu_irqs = omap3xxx_usb_tll_hs_irqs,
.main_clk = "usbtll_fck", .main_clk = "usbtll_fck",
.prcm = { .prcm = {

4
arch/arm/mach-omap2/pm34xx.c
View File

@ -330,10 +330,6 @@ void omap_sram_idle(void)
omap3_sram_restore_context(); omap3_sram_restore_context();
omap2_sms_restore_context(); omap2_sms_restore_context();
} }
if (core_next_state == PWRDM_POWER_OFF)
omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
OMAP3430_GR_MOD,
OMAP3_PRM_VOLTCTRL_OFFSET);
} }
omap3_intc_resume_idle(); omap3_intc_resume_idle();

1
arch/arm/mach-pxa/include/mach/hx4700.h
View File

@ -14,6 +14,7 @@
#include <linux/gpio.h> #include <linux/gpio.h>
#include <linux/mfd/asic3.h> #include <linux/mfd/asic3.h>
#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */
#define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO #define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO
#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS) #define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)

2
arch/arm/mach-rockchip/platsmp.c
View File

@ -152,7 +152,7 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
node = of_find_compatible_node(NULL, NULL, "rockchip,rk3066-pmu"); node = of_find_compatible_node(NULL, NULL, "rockchip,rk3066-pmu");
if (!node) { if (!node) {
pr_err("%s: could not find sram dt node\n", __func__); pr_err("%s: could not find pmu dt node\n", __func__);
return; return;
} }

1
arch/arm/mach-shmobile/board-armadillo800eva.c
View File

@ -992,6 +992,7 @@ static struct asoc_simple_card_info fsi_wm8978_info = {
.platform = "sh_fsi2", .platform = "sh_fsi2",
.daifmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, .daifmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM,
.cpu_dai = { .cpu_dai = {
.fmt = SND_SOC_DAIFMT_IB_NF,
.name = "fsia-dai", .name = "fsia-dai",
}, },
.codec_dai = { .codec_dai = {

4
arch/arm/mach-shmobile/board-lager.c
View File

@ -588,14 +588,12 @@ static struct asoc_simple_card_info rsnd_card_info = {
.card = "SSI01-AK4643", .card = "SSI01-AK4643",
.codec = "ak4642-codec.2-0012", .codec = "ak4642-codec.2-0012",
.platform = "rcar_sound", .platform = "rcar_sound",
.daifmt = SND_SOC_DAIFMT_LEFT_J, .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
.cpu_dai = { .cpu_dai = {
.name = "rcar_sound", .name = "rcar_sound",
.fmt = SND_SOC_DAIFMT_CBS_CFS,
}, },
.codec_dai = { .codec_dai = {
.name = "ak4642-hifi", .name = "ak4642-hifi",
.fmt = SND_SOC_DAIFMT_CBM_CFM,
.sysclk = 11289600, .sysclk = 11289600,
}, },
}; };

Some files were not shown because too many files have changed in this diff Show More